The following commit has been merged into the irq/core branch of tip: Commit-ID: 70a29c32cf7909e96a469ae71d88b2c0fbcbd767 Gitweb: https://git.kernel.org/tip/70a29c32cf7909e96a469ae71d88b2c0fbcbd767 Author: Marc Zyngier <maz@xxxxxxxxxx> AuthorDate: Sat, 25 Apr 2020 15:11:20 +01:00 Committer: Marc Zyngier <maz@xxxxxxxxxx> CommitterDate: Sun, 13 Sep 2020 17:05:39 +01:00 irqchip/gic-v3: Describe the SGI range As we are about to start making use of SGIs in a more conventional way, let's describe it is the GICv3 list of interrupt types. Reviewed-by: Valentin Schneider <valentin.schneider@xxxxxxx> Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx> --- drivers/irqchip/irq-gic-v3.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 850842f..f7c99a3 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -112,6 +112,7 @@ static DEFINE_PER_CPU(bool, has_rss); #define DEFAULT_PMR_VALUE 0xf0 enum gic_intid_range { + SGI_RANGE, PPI_RANGE, SPI_RANGE, EPPI_RANGE, @@ -123,6 +124,8 @@ enum gic_intid_range { static enum gic_intid_range __get_intid_range(irq_hw_number_t hwirq) { switch (hwirq) { + case 0 ... 15: + return SGI_RANGE; case 16 ... 31: return PPI_RANGE; case 32 ... 1019: @@ -148,15 +151,22 @@ static inline unsigned int gic_irq(struct irq_data *d) return d->hwirq; } -static inline int gic_irq_in_rdist(struct irq_data *d) +static inline bool gic_irq_in_rdist(struct irq_data *d) { - enum gic_intid_range range = get_intid_range(d); - return range == PPI_RANGE || range == EPPI_RANGE; + switch (get_intid_range(d)) { + case SGI_RANGE: + case PPI_RANGE: + case EPPI_RANGE: + return true; + default: + return false; + } } static inline void __iomem *gic_dist_base(struct irq_data *d) { switch (get_intid_range(d)) { + case SGI_RANGE: case PPI_RANGE: case EPPI_RANGE: /* SGI+PPI -> SGI_base for this CPU */ @@ -253,6 +263,7 @@ static void gic_enable_redist(bool enable) static u32 convert_offset_index(struct irq_data *d, u32 offset, u32 *index) { switch (get_intid_range(d)) { + case SGI_RANGE: case PPI_RANGE: case SPI_RANGE: *index = d->hwirq; @@ -1277,6 +1288,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, chip = &gic_eoimode1_chip; switch (__get_intid_range(hw)) { + case SGI_RANGE: case PPI_RANGE: case EPPI_RANGE: irq_set_percpu_devid(irq);
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