The following commit has been merged into the x86/fsgsbase branch of tip: Commit-ID: 0b2c605fa4ee3117c00b97b7af67791576b28f88 Gitweb: https://git.kernel.org/tip/0b2c605fa4ee3117c00b97b7af67791576b28f88 Author: Borislav Petkov <bp@xxxxxxx> AuthorDate: Thu, 20 Aug 2020 11:10:15 +02:00 Committer: Borislav Petkov <bp@xxxxxxx> CommitterDate: Mon, 24 Aug 2020 10:23:40 +02:00 x86/entry/64: Correct the comment over SAVE_AND_SET_GSBASE Add the proper explanation why an LFENCE is not needed in the FSGSBASE case. Fixes: c82965f9e530 ("x86/entry/64: Handle FSGSBASE enabled paranoid entry/exit") Signed-off-by: Borislav Petkov <bp@xxxxxxx> Link: https://lkml.kernel.org/r/20200821090710.GE12181@xxxxxxx --- arch/x86/entry/entry_64.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 70dea93..bf78de4 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -840,8 +840,9 @@ SYM_CODE_START_LOCAL(paranoid_entry) * retrieve and set the current CPUs kernel GSBASE. The stored value * has to be restored in paranoid_exit unconditionally. * - * The MSR write ensures that no subsequent load is based on a - * mispredicted GSBASE. No extra FENCE required. + * The unconditional write to GS base below ensures that no subsequent + * loads based on a mispredicted GS base can happen, therefore no LFENCE + * is needed here. */ SAVE_AND_SET_GSBASE scratch_reg=%rax save_reg=%rbx ret
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