Commit-ID: 8f5b703add99473b59b4a38a6b66afbafc29d92e
Gitweb: https://git.kernel.org/tip/8f5b703add99473b59b4a38a6b66afbafc29d92e
Author: John Garry <john.garry@xxxxxxxxxx>
AuthorDate: Fri, 28 Jun 2019 22:35:51 +0800
Committer: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
CommitDate: Tue, 2 Jul 2019 16:08:15 -0300
perf jevents: Add support for Hisi hip08 HHA PMU aliasing
Add support for Hisi hip08 HHA PMU aliasing.
The kernel driver is in drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
Signed-off-by: John Garry <john.garry@xxxxxxxxxx>
Acked-by: Jiri Olsa <jolsa@xxxxxxxxxx>
Cc: Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>
Cc: Andi Kleen <ak@xxxxxxxxxxxxxxx>
Cc: Ben Hutchings <ben@xxxxxxxxxxxxxxx>
Cc: Hendrik Brueckner <brueckner@xxxxxxxxxxxxx>
Cc: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: Mathieu Poirier <mathieu.poirier@xxxxxxxxxx>
Cc: Namhyung Kim <namhyung@xxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Shaokun Zhang <zhangshaokun@xxxxxxxxxxxxx>
Cc: Thomas Richter <tmricht@xxxxxxxxxxxxx>
Cc: Will Deacon <will.deacon@xxxxxxx>
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: linuxarm@xxxxxxxxxx
Link: http://lkml.kernel.org/r/1561732552-143038-4-git-send-email-john.garry@xxxxxxxxxx
Signed-off-by: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
---
.../arch/arm64/hisilicon/hip08/uncore-hha.json | 51 ++++++++++++++++++++++
tools/perf/pmu-events/jevents.c | 1 +
2 files changed, 52 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
new file mode 100644
index 000000000000..447d3064de90
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
@@ -0,0 +1,51 @@
+[
+ {
+ "EventCode": "0x00",
+ "EventName": "uncore_hisi_hha.rx_ops_num",
+ "BriefDescription": "The number of all operations received by the HHA",
+ "PublicDescription": "The number of all operations received by the HHA",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x01",
+ "EventName": "uncore_hisi_hha.rx_outer",
+ "BriefDescription": "The number of all operations received by the HHA from another socket",
+ "PublicDescription": "The number of all operations received by the HHA from another socket",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x02",
+ "EventName": "uncore_hisi_hha.rx_sccl",
+ "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket",
+ "PublicDescription": "The number of all operations received by the HHA from another SCCL in this socket",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1c",
+ "EventName": "uncore_hisi_hha.rd_ddr_64b",
+ "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes",
+ "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1d",
+ "EventName": "uncore_hisi_hha.wr_dr_64b",
+ "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
+ "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1e",
+ "EventName": "uncore_hisi_hha.rd_ddr_128b",
+ "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
+ "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1f",
+ "EventName": "uncore_hisi_hha.wr_ddr_128b",
+ "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
+ "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index d5997741f1d8..3c95affd85a4 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -237,6 +237,7 @@ static struct map {
{ "CPU-M-SF", "cpum_sf" },
{ "UPI LL", "uncore_upi" },
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
+ { "hisi_sccl,hha", "hisi_sccl,hha" },
{}
};
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