Commit-ID: 67d06e6efa41c4135cfc4c4c5c9b55d5e3a9b6f7 Gitweb: https://git.kernel.org/tip/67d06e6efa41c4135cfc4c4c5c9b55d5e3a9b6f7 Author: Mesih Kilinc <mesihkilinc@xxxxxxxxx> AuthorDate: Mon, 11 Feb 2019 12:21:07 +0300 Committer: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> CommitDate: Thu, 2 May 2019 21:55:58 +0200 dt-bindings: timer: Add Allwinner suniv timer Add compatible string for Allwinner suniv timer which is similar to sun4i timer. Signed-off-by: Mesih Kilinc <mesihkilinc@xxxxxxxxx> Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx> Reviewed-by: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> --- Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt index 5c2e23574ca0..3da9d515c03a 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt @@ -2,7 +2,9 @@ Allwinner A1X SoCs Timer Controller Required properties: -- compatible : should be "allwinner,sun4i-a10-timer" +- compatible : should be one of the following: + "allwinner,sun4i-a10-timer" + "allwinner,suniv-f1c100s-timer" - reg : Specifies base physical address and size of the registers. - interrupts : The interrupt of the first timer - clocks: phandle to the source clock (usually a 24 MHz fixed clock)
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