[tip:irq/core] dt-bindings: interrupt-controller: loongson ls1x intc

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Commit-ID:  3bdd7f7433fd1c71b7c5ff1223d29c419e3a9d54
Gitweb:     https://git.kernel.org/tip/3bdd7f7433fd1c71b7c5ff1223d29c419e3a9d54
Author:     Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
AuthorDate: Fri, 1 Feb 2019 14:22:36 +0800
Committer:  Marc Zyngier <marc.zyngier@xxxxxxx>
CommitDate: Thu, 14 Feb 2019 10:34:31 +0000

dt-bindings: interrupt-controller: loongson ls1x intc

Dt-bindings doc about Loongson-1 interrupt controller.

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx>
---
 .../interrupt-controller/loongson,ls1x-intc.txt    | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
new file mode 100644
index 000000000000..a63ed9fcb535
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
@@ -0,0 +1,24 @@
+Loongson ls1x Interrupt Controller
+
+Required properties:
+
+- compatible : should be "loongson,ls1x-intc". Valid strings are:
+
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2.
+- interrupts : Specifies the CPU interrupt the controller is connected to.
+
+Example:
+
+intc: interrupt-controller@1fd01040 {
+	compatible = "loongson,ls1x-intc";
+	reg = <0x1fd01040 0x18>;
+
+	interrupt-controller;
+	#interrupt-cells = <2>;
+
+	interrupt-parent = <&cpu_intc>;
+	interrupts = <2>;
+};



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