Commit-ID: 08e823c2c5899ef2de3aa1727233f1f19e8c1cc1 Gitweb: https://git.kernel.org/tip/08e823c2c5899ef2de3aa1727233f1f19e8c1cc1 Author: Janakarajan Natarajan <Janakarajan.Natarajan@xxxxxxx> AuthorDate: Wed, 7 Nov 2018 20:59:07 +0000 Committer: Borislav Petkov <bp@xxxxxxx> CommitDate: Wed, 7 Nov 2018 22:21:03 +0100 x86/cpufeatures: Add WBNOINVD feature definition Add a new cpufeature definition for the WBNOINVD instruction. The WBNOINVD instruction writes all modified cache lines in all levels of the cache associated with a processor to main memory while retaining the cached values. Both AMD and Intel support this instruction. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@xxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> CC: David Woodhouse <dwmw@xxxxxxxxxxxx> CC: Fenghua Yu <fenghua.yu@xxxxxxxxx> CC: "H. Peter Anvin" <hpa@xxxxxxxxx> CC: Ingo Molnar <mingo@xxxxxxxxxx> CC: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> CC: Rudolf Marek <r.marek@xxxxxxxxxxxx> CC: Thomas Gleixner <tglx@xxxxxxxxxxxxx> CC: x86-ml <x86@xxxxxxxxxx> Link: http://lkml.kernel.org/r/1541624211-32196-1-git-send-email-Janakarajan.Natarajan@xxxxxxx --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 28c4a502b419..39a48f06d39d 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -281,6 +281,7 @@ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */ +#define X86_FEATURE_WBNOINVD (13*32+ 9) /* WBNOINVD instruction */ #define X86_FEATURE_AMD_IBPB (13*32+12) /* "" Indirect Branch Prediction Barrier */ #define X86_FEATURE_AMD_IBRS (13*32+14) /* "" Indirect Branch Restricted Speculation */ #define X86_FEATURE_AMD_STIBP (13*32+15) /* "" Single Thread Indirect Branch Predictors */
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