On Mon, 2018-02-19 at 10:39 +0100, Ingo Molnar wrote: > * David Woodhouse <dwmw2@xxxxxxxxxxxxx> wrote: > > > > > On Mon, 2018-02-19 at 10:20 +0100, Peter Zijlstra wrote: > > > > > > > > > I did not update or otherwise change packages while I was bisecting; the > > > machine is: > > > > > > vendor_id : GenuineIntel > > > cpu family : 6 > > > model : 62 > > > model name : Intel(R) Xeon(R) CPU E5-2680 v2 @ 2.80GHz > > > stepping : 4 > > > microcode : 0x428 > > That's IVX with a microcode that doesn't *have* IBRS/IBPB. I don't > > think there's a publicly available microcode that does; I assume you > > didn't have one and build it into your kernel for early loading, and > > thus you really weren't even using IBRS here? The code never even gets > > patched in? > Note that PeterZ's boot troubles only match the *symptoms* of the spurious > failures reported by Tim Chen. Your commit wasn't bisected to. > > I linked these two reports on the (remote) possibility that they might be related > via some alignment dependent bug somewhere else in the x86 kernel - possibly > completely unrelated to any IBRS/IBPB details. Understood. I was merely *accentuating* the "completely unrelated to any IBRS/IBPB" bit, in a "la la la I'm ignoring this because I'm working on other things" kind of a way... :)
Attachment:
smime.p7s
Description: S/MIME cryptographic signature
|