Commit-ID: c6ef89421e236d75693ae968d80d44a52409889d
Gitweb: http://git.kernel.org/tip/c6ef89421e236d75693ae968d80d44a52409889d
Author: Ingo Molnar <mingo@xxxxxxxxxx>
AuthorDate: Fri, 1 Sep 2017 11:04:56 +0200
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Fri, 1 Sep 2017 11:04:56 +0200
x86/idt: Fix the X86_TRAP_BP gate
Andrei Vagin reported a CRIU regression and bisected it back to:
90f6225fba0c ("x86/idt: Move IST stack based traps to table init")
This table init conversion loses the system-gate property of X86_TRAP_BP
and erroneously moves it from DPL3 to DPL0.
Fix it.
Reported-by: Andrei Vagin <avagin@xxxxxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: dvlasenk@xxxxxxxxxx
Cc: linux-tip-commits@xxxxxxxxxxxxxxx
Cc: peterz@xxxxxxxxxxxxx
Cc: brgerst@xxxxxxxxx
Cc: rostedt@xxxxxxxxxxx
Cc: bp@xxxxxxxxx
Cc: luto@xxxxxxxxxx
Cc: jpoimboe@xxxxxxxxxx
Cc: Cyrill Gorcunov <gorcunov@xxxxxxxxxx>
Cc: torvalds@xxxxxxxxxxxxxxxxxxxx
Cc: tip-bot for Jacob Shin <tipbot@xxxxxxxxx>
Link: http://lkml.kernel.org/r/20170901082630.xvyi5bwk6etmppqc@xxxxxxxxx
---
arch/x86/kernel/idt.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index 61b490c..6107ee1 100644
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -44,6 +44,10 @@ struct idt_data {
#define ISTG(_vector, _addr, _ist) \
G(_vector, _addr, _ist, GATE_INTERRUPT, DPL0, __KERNEL_CS)
+/* System interrupt gate with interrupt stack */
+#define SISTG(_vector, _addr, _ist) \
+ G(_vector, _addr, _ist, GATE_INTERRUPT, DPL3, __KERNEL_CS)
+
/* Task gate */
#define TSKG(_vector, _gdt) \
G(_vector, NULL, DEFAULT_STACK, GATE_TASK, DPL0, _gdt << 3)
@@ -181,7 +185,7 @@ gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss;
static const __initdata struct idt_data ist_idts[] = {
ISTG(X86_TRAP_DB, debug, DEBUG_STACK),
ISTG(X86_TRAP_NMI, nmi, NMI_STACK),
- ISTG(X86_TRAP_BP, int3, DEBUG_STACK),
+ SISTG(X86_TRAP_BP, int3, DEBUG_STACK),
ISTG(X86_TRAP_DF, double_fault, DOUBLEFAULT_STACK),
#ifdef CONFIG_X86_MCE
ISTG(X86_TRAP_MC, &machine_check, MCE_STACK),
--
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