Commit-ID: d08b82c9e11e0997d2fb7dbf07a1f0c4112e587e
Gitweb: http://git.kernel.org/tip/d08b82c9e11e0997d2fb7dbf07a1f0c4112e587e
Author: Mans Rullgard <mans@xxxxxxxxx>
AuthorDate: Wed, 20 Jan 2016 18:07:16 +0000
Committer: Jason Cooper <jason@xxxxxxxxxxxxxx>
CommitDate: Thu, 18 Feb 2016 01:16:37 +0000
devicetree: Add binding for Sigma Designs SMP86xx interrupt controller
This adds a binding for the secondary interrupt controller in
Sigma Designs SMP86xx and SMP87xx chips.
Signed-off-by: Mans Rullgard <mans@xxxxxxxxx>
[ jac: use 'interrupt-controller@XXX' notation in binding doc ]
Acked-by: Rob Herring <robh@xxxxxxxxxx>
Link: https://lkml.kernel.org/r/1453313237-18570-1-git-send-email-mans@xxxxxxxxx
Signed-off-by: Jason Cooper <jason@xxxxxxxxxxxxxx>
---
.../interrupt-controller/sigma,smp8642-intc.txt | 49 ++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt
new file mode 100644
index 0000000..1f441fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt
@@ -0,0 +1,49 @@
+Sigma Designs SMP86xx/SMP87xx secondary interrupt controller
+
+Required properties:
+- compatible: should be "sigma,smp8642-intc"
+- reg: physical address of MMIO region
+- ranges: address space mapping of child nodes
+- interrupt-parent: phandle of parent interrupt controller
+- interrupt-controller: boolean
+- #address-cells: should be <1>
+- #size-cells: should be <1>
+
+One child node per control block with properties:
+- reg: address of registers for this control block
+- interrupt-controller: boolean
+- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt
+- interrupts: interrupt spec of primary interrupt controller
+
+Example:
+
+interrupt-controller@6e000 {
+ compatible = "sigma,smp8642-intc";
+ reg = <0x6e000 0x400>;
+ ranges = <0x0 0x6e000 0x400>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ irq0: interrupt-controller@0 {
+ reg = <0x000 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ irq1: interrupt-controller@100 {
+ reg = <0x100 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ irq2: interrupt-controller@300 {
+ reg = <0x300 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
--
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