Commit-ID: d271976dbb31c3ac5653745d03d68c4235d34119 Gitweb: http://git.kernel.org/tip/d271976dbb31c3ac5653745d03d68c4235d34119 Author: Marc Zyngier <marc.zyngier@xxxxxxx> AuthorDate: Wed, 30 Sep 2015 11:39:59 +0100 Committer: Marc Zyngier <marc.zyngier@xxxxxxx> CommitDate: Fri, 9 Oct 2015 22:16:51 +0100 arm64: el2_setup: Make sure ICC_SRE_EL2.SRE sticks before using GICv3 sysregs Contrary to what was originally expected, EL3 firmware can (for whatever reason) disable GICv3 system register access. In this case, the kernel explodes very early. Work around this by testing if the SRE bit sticks or not. If it doesn't, abort the GICv3 setup, and pray that the firmware has passed a DT that doesn't contain a GICv3 node. Reviewed-by: Catalin Marinas <catalin.marinas@xxxxxxx> Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx> --- arch/arm64/kernel/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 90d09ed..351a4de 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -498,6 +498,8 @@ CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1 orr x0, x0, #ICC_SRE_EL2_ENABLE // Set ICC_SRE_EL2.Enable==1 msr_s ICC_SRE_EL2, x0 isb // Make sure SRE is now set + mrs_s x0, ICC_SRE_EL2 // Read SRE back, + tbz x0, #0, 3f // and check that it sticks msr_s ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults 3: -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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