On Mon, Mar 16, 2015 at 5:09 AM, tip-bot for Andy Lutomirski
<tipbot@xxxxxxxxx> wrote:
> Commit-ID: f7113ffa3bcd630066119723f539db75a5721c88
> Gitweb: http://git.kernel.org/tip/f7113ffa3bcd630066119723f539db75a5721c88
> Author: Andy Lutomirski <luto@xxxxxxxxxxxxxx>
> AuthorDate: Tue, 10 Mar 2015 11:06:00 -0700
> Committer: Ingo Molnar <mingo@xxxxxxxxxx>
> CommitDate: Mon, 16 Mar 2015 11:05:36 +0100
>
> x86/asm/entry/32: Document our abuse of x86_hw_tss::ss1 and x86_hw_tss::sp1
>
> This has confused me for a while. Now that I figured it out, document it.
>
> Signed-off-by: Andy Lutomirski <luto@xxxxxxxxxxxxxx>
> Cc: Borislav Petkov <bp@xxxxxxxxx>
> Cc: Denys Vlasenko <dvlasenk@xxxxxxxxxx>
> Cc: H. Peter Anvin <hpa@xxxxxxxxx>
> Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
> Cc: Oleg Nesterov <oleg@xxxxxxxxxx>
> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> Link: http://lkml.kernel.org/r/b7efc1b7364039824776f68e9ddee9ec1500e894.1426009661.git.luto@xxxxxxxxxxxxxx
> Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
> ---
> arch/x86/include/asm/processor.h | 21 ++++++++++++++++++---
> 1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
> index aed6d4f..c3a037b 100644
> --- a/arch/x86/include/asm/processor.h
> +++ b/arch/x86/include/asm/processor.h
> @@ -209,9 +209,24 @@ struct x86_hw_tss {
> unsigned short back_link, __blh;
> unsigned long sp0;
> unsigned short ss0, __ss0h;
> - unsigned long sp1;
> - /* ss1 caches MSR_IA32_SYSENTER_CS: */
> - unsigned short ss1, __ss1h;
> +
> + /*
> + * We don't use ring 1, so sp1 and ss1 are convenient scratch
> + * spaces in the same cacheline as sp0. We use them to cache
> + * some MSR values to avoid unnecessary wrmsr instructions.
> + *
> + * We use SYSENTER_ESP to find sp0 and for the NMI emergency
> + * stack, but we need to context switch it because we do
> + * horrible things to the kernel stack in vm86 mode.
I should have sent out my v2 sooner. Denys correctly noted that the
sp1 cache is completely useless. I'll send an incremental patch
today.
--Andy
> + *
> + * We use SYSENTER_CS to disable sysenter in vm86 mode to avoid
> + * corrupting the stack if we went through the sysenter path
> + * from vm86 mode.
> + */
> + unsigned long sp1; /* MSR_IA32_SYSENTER_ESP */
> + unsigned short ss1; /* MSR_IA32_SYSENTER_CS */
> +
> + unsigned short __ss1h;
> unsigned long sp2;
> unsigned short ss2, __ss2h;
> unsigned long __cr3;
--
Andy Lutomirski
AMA Capital Management, LLC
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