Commit-ID: 298dcb2dd0267d51e4f7c94a628cd0765a50ad75
Gitweb: http://git.kernel.org/tip/298dcb2dd0267d51e4f7c94a628cd0765a50ad75
Author: Grzegorz Jaszczyk <jaz@xxxxxxxxxxxx>
AuthorDate: Thu, 25 Sep 2014 13:17:18 +0200
Committer: Jason Cooper <jason@xxxxxxxxxxxxxx>
CommitDate: Sun, 2 Nov 2014 01:31:10 +0000
irqchip: armada-370-xp: Fix MSI interrupt handling
The MSI interrupts use the 16 high doorbells, which are notified by using IRQ1
of the main interrupt controller.
The MSI interrupts were handled correctly for Armada-XP and Armada-370 but not
for Armada-375 and Armada-38x, which use chained handler for the MPIC.
This commit fixes that by checking proper interrupt number in chained handler
for the MPIC.
Signed-off-by: Grzegorz Jaszczyk <jaz@xxxxxxxxxxxx>
Reviewed-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxxxxxxxxx>
Fixes: bc69b8adfe22 ("irqchip: armada-370-xp: Setup a chained handler for the MPIC")
Cc: <stable@xxxxxxxxxxxxxxx> # v3.15+
Acked-by: Ezequiel Garcia <ezequiel.garcia@xxxxxxxxxxxxxxxxxx>
Link: https://lkml.kernel.org/r/1411643839-64925-2-git-send-email-jaz@xxxxxxxxxxxx
Signed-off-by: Jason Cooper <jason@xxxxxxxxxxxxxx>
---
drivers/irqchip/irq-armada-370-xp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 3e238cd..2f01073 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -413,9 +413,9 @@ static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq,
irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);
- if (irqmap & BIT(0)) {
+ if (irqmap & BIT(1)) {
armada_370_xp_handle_msi_irq(NULL, true);
- irqmap &= ~BIT(0);
+ irqmap &= ~BIT(1);
}
for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {
--
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