Commit-ID: a2c225101234bcef8f40497bd50ccb5e9c1fb527
Gitweb: http://git.kernel.org/tip/a2c225101234bcef8f40497bd50ccb5e9c1fb527
Author: Sudeep Holla <sudeep.holla@xxxxxxx>
AuthorDate: Tue, 26 Aug 2014 16:03:34 +0100
Committer: Jason Cooper <jason@xxxxxxxxxxxxxx>
CommitDate: Sun, 14 Sep 2014 08:57:25 +0000
irqchip: gic-v3: Refactor gic_enable_redist to support both enabling and disabling
Currently gic_enable_redist configures the redistributors to never
assert WakeRequest signal. However when powering down the processors
with wake-up enabled(i.e suspend), we need to configure it to assert
that signal.
This patch extends gic_enable_redist so that the redistributor can be
configure to assert WakeRequest and hold interrupts as pending. This is
useful in suspending the processors.
This patch also adds check to make sure GICR_WAKER is accessible when
configuring it.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
Signed-off-by: Sudeep Holla <sudeep.holla@xxxxxxx>
[maz: removed reference to GICD_CTLR.DS and added read-back of
GICR_WAKER to check that it is not RAZ/WI]
Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx>
Acked-by: Marc Zyngier <marc.zyngier@xxxxxxx>
Link: https://lkml.kernel.org/r/1409065415-20176-2-git-send-email-sudeep.holla@xxxxxxx
Signed-off-by: Jason Cooper <jason@xxxxxxxxxxxxxx>
---
drivers/irqchip/irq-gic-v3.c | 30 ++++++++++++++++++++----------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 57eaa5a..37062ba 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -155,7 +155,7 @@ static void gic_enable_sre(void)
pr_err("GIC: unable to set SRE (disabled at EL2), panic ahead\n");
}
-static void gic_enable_redist(void)
+static void gic_enable_redist(bool enable)
{
void __iomem *rbase;
u32 count = 1000000; /* 1s! */
@@ -163,20 +163,30 @@ static void gic_enable_redist(void)
rbase = gic_data_rdist_rd_base();
- /* Wake up this CPU redistributor */
val = readl_relaxed(rbase + GICR_WAKER);
- val &= ~GICR_WAKER_ProcessorSleep;
+ if (enable)
+ /* Wake up this CPU redistributor */
+ val &= ~GICR_WAKER_ProcessorSleep;
+ else
+ val |= GICR_WAKER_ProcessorSleep;
writel_relaxed(val, rbase + GICR_WAKER);
- while (readl_relaxed(rbase + GICR_WAKER) & GICR_WAKER_ChildrenAsleep) {
- count--;
- if (!count) {
- pr_err_ratelimited("redist didn't wake up...\n");
- return;
- }
+ if (!enable) { /* Check that GICR_WAKER is writeable */
+ val = readl_relaxed(rbase + GICR_WAKER);
+ if (!(val & GICR_WAKER_ProcessorSleep))
+ return; /* No PM support in this redistributor */
+ }
+
+ while (count--) {
+ val = readl_relaxed(rbase + GICR_WAKER);
+ if (enable ^ (val & GICR_WAKER_ChildrenAsleep))
+ break;
cpu_relax();
udelay(1);
};
+ if (!count)
+ pr_err_ratelimited("redistributor failed to %s...\n",
+ enable ? "wakeup" : "sleep");
}
/*
@@ -381,7 +391,7 @@ static void gic_cpu_init(void)
if (gic_populate_rdist())
return;
- gic_enable_redist();
+ gic_enable_redist(true);
rbase = gic_data_rdist_sgi_base();
--
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