Commit-ID: aa8e4f22ab7773352ba3895597189b8097f2c307 Gitweb: http://git.kernel.org/tip/aa8e4f22ab7773352ba3895597189b8097f2c307 Author: David E. Box <david.e.box@xxxxxxxxxxxxxxx> AuthorDate: Wed, 27 Aug 2014 14:40:39 -0700 Committer: H. Peter Anvin <hpa@xxxxxxxxxxxxxxx> CommitDate: Wed, 27 Aug 2014 14:48:33 -0700 x86/iosf: Add Kconfig prompt for IOSF_MBI selection Fixes an error in having the iosf build as 'default m'. On X86 SoC's the iosf sideband is the only way to access information for some registers, as opposed to through MSR's on other Intel architectures. While selecting IOSF_MBI is preferred, it does mean carrying extra code on non-SoC architectures. This exports the selection to the user, allowing those driver writers to compile out iosf code if it's not being built. Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx> Link: http://lkml.kernel.org/r/1409175640-32426-2-git-send-email-david.e.box@xxxxxxxxxxxxxxx Signed-off-by: H. Peter Anvin <hpa@xxxxxxxxxxxxxxx> --- arch/x86/Kconfig | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5d0bf1a..a99988f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2433,9 +2433,19 @@ config X86_DMA_REMAP depends on STA2X11 config IOSF_MBI - tristate - default m + tristate "Intel System On Chip IOSF Sideband support" depends on PCI + ---help--- + Enables sideband access to mailbox registers on SoC's. The sideband is + available on the following platforms. This list is not meant to be + exclusive. + - BayTrail + - Cherryview + - Braswell + - Quark + + You should say Y if you are running a kernel on one of these + platforms. config PMC_ATOM def_bool y -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
|