Commit-ID: 224aa3ed45c8735ae02bb2ecca002409fa6aa772
Gitweb: http://git.kernel.org/tip/224aa3ed45c8735ae02bb2ecca002409fa6aa772
Author: Stefan Agner <stefan@xxxxxxxx>
AuthorDate: Wed, 5 Mar 2014 23:11:08 +0100
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Thu, 6 Mar 2014 11:34:14 +0100
clocksource: vf_pit_timer: use complement for sched_clock reading
Vybrids PIT register is monitonic decreasing. However, sched_clock
reading needs to be monitonic increasing. Use bitwise not to get
the complement of the clock register. This fixes the clock going
backward. Also, the clock now starts at 0 since we load the
register with the maximum value at start.
Signed-off-by: Stefan Agner <stefan@xxxxxxxx>
Acked-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
Cc: daniel.lezcano@xxxxxxxxxx
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: linux@xxxxxxxxxxxxxxxx
Link: http://lkml.kernel.org/r/d25af915993aec1b486be653eb86f748ddef54fe.1394057313.git.stefan@xxxxxxxx
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
---
drivers/clocksource/vf_pit_timer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/vf_pit_timer.c b/drivers/clocksource/vf_pit_timer.c
index 02821b0..a918bc4 100644
--- a/drivers/clocksource/vf_pit_timer.c
+++ b/drivers/clocksource/vf_pit_timer.c
@@ -54,7 +54,7 @@ static inline void pit_irq_acknowledge(void)
static u64 pit_read_sched_clock(void)
{
- return __raw_readl(clksrc_base + PITCVAL);
+ return ~__raw_readl(clksrc_base + PITCVAL);
}
static int __init pit_clocksource_init(unsigned long rate)
--
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