Re: [tip:x86/urgent] x86, cpu, amd: Add workaround for family 16h, erratum 793

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* H. Peter Anvin <hpa@xxxxxxxxx> wrote:

> On 01/14/2014 04:45 PM, tip-bot for Borislav Petkov wrote:
> > +		rdmsrl(MSR_AMD64_LS_CFG, val);
> > +		if (!(val & BIT(15)))
> > +			wrmsrl(MSR_AMD64_LS_CFG, val | BIT(15));
> 
> Incidentally, I'm wondering if we shouldn't have a
> set_in_msr()/clear_in_msr() set of functions which would incorporate the
> above construct:
> 
> void set_in_msr(u32 msr, u64 mask)
> {
> 	u64 old, new;
> 
> 	old = rdmsrl(msr);
> 	new = old | mask;
> 	if (old != new)
> 		wrmsrl(msr, new);
> }
> 
> ... and the obvious equivalent for clear_in_msr().
> 
> The perhaps only question is if it should be "set/clear_bit_in_msr()"
> rather than having to haul a full 64-bit mask in the common case.

I'd suggest the introduction of a standard set of methods operating on 
MSRs:

	msr_read()
	msr_write()
	msr_set_bit()
	msr_clear_bit()
	msr_set_mask()
	msr_clear_mask()

etc.

msr_read() would essentially map to rdmsr_safe(). Each method has a 
return value that can be checked for failure.

Note that the naming of 'msr_set_bit()' and 'msr_clear_bit()' mirrors 
that of bitops, and set_mask/clear_mask is named along a similar 
pattern, so that it's more immediately obvious what's going on.

With such methods in place we could use them in most new code, and 
would use 'raw, unsafe' rdmsr()/wrmsr() only in very specific, 
justified cases.

Thanks,

	Ingo
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