Commit-ID: 0f531431d3de88efb4234d6c0ce22089ec035a38 Gitweb: http://git.kernel.org/tip/0f531431d3de88efb4234d6c0ce22089ec035a38 Author: Mathias Nyman <mathias.nyman@xxxxxxxxxxxxxxx> AuthorDate: Fri, 13 Sep 2013 17:02:29 +0300 Committer: Ingo Molnar <mingo@xxxxxxxxxx> CommitDate: Sat, 14 Sep 2013 08:06:28 +0200 x86/intel/lpss: Add pin control support to Intel low power subsystem x86 chips with LPSS (low power subsystem) such as Lynxpoint and Baytrail have SoC like peripheral support and controllable pins. At the moment, Baytrail needs the pinctrl-baytrail driver to let peripherals control their gpio resources, but more pincontrol functions such as pin muxing and grouping are possible to add later. Signed-off-by: Mathias Nyman <mathias.nyman@xxxxxxxxxxxxxxx> Reviewed-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> Cc: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx> Link: http://lkml.kernel.org/r/1379080949-21734-1-git-send-email-mathias.nyman@xxxxxxxxxxxxxxx Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx> --- arch/x86/Kconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index b32ebf9..4d5843d 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -482,11 +482,12 @@ config X86_INTEL_LPSS bool "Intel Low Power Subsystem Support" depends on ACPI select COMMON_CLK + select PINCTRL ---help--- Select to build support for Intel Low Power Subsystem such as found on Intel Lynxpoint PCH. Selecting this option enables - things like clock tree (common clock framework) which are needed - by the LPSS peripheral drivers. + things like clock tree (common clock framework) and pincontrol + which are needed by the LPSS peripheral drivers. config X86_RDC321X bool "RDC R-321x SoC" -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
|