Commit-ID: f4e2e9a4b26789d963000f974f2dc80230bb4674
Gitweb: http://git.kernel.org/tip/f4e2e9a4b26789d963000f974f2dc80230bb4674
Author: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
AuthorDate: Thu, 21 Mar 2013 22:50:04 +0100
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Mon, 8 Apr 2013 17:39:29 +0200
xtensa: Use generic idle loop
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
Cc: Rusty Russell <rusty@xxxxxxxxxxxxxxx>
Cc: Paul McKenney <paulmck@xxxxxxxxxxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@xxxxxxxxxxxxxxxxxx>
Cc: Magnus Damm <magnus.damm@xxxxxxxxx>
Acked-by: Chris Zankel <chris@xxxxxxxxxx>
Link: http://lkml.kernel.org/r/20130321215235.546600507@xxxxxxxxxxxxx
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
---
arch/xtensa/Kconfig | 1 +
arch/xtensa/kernel/process.c | 14 ++------------
2 files changed, 3 insertions(+), 12 deletions(-)
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index b09de49..e0144ff 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -19,6 +19,7 @@ config XTENSA
select CLONE_BACKWARDS
select IRQ_DOMAIN
select HAVE_OPROFILE
+ select GENERIC_IDLE_LOOP
help
Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index 5cd82e9..1c85323 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -105,19 +105,9 @@ void coprocessor_flush_all(struct thread_info *ti)
/*
* Powermanagement idle function, if any is provided by the platform.
*/
-
-void cpu_idle(void)
+void arch_cpu_idle(void)
{
- local_irq_enable();
-
- /* endless idle loop with no priority at all */
- while (1) {
- rcu_idle_enter();
- while (!need_resched())
- platform_idle();
- rcu_idle_exit();
- schedule_preempt_disabled();
- }
+ platform_idle();
}
/*
--
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