Commit-ID: 75bc5ca89827fe3f2399321b2920a30bcf658049 Gitweb: http://git.kernel.org/tip/75bc5ca89827fe3f2399321b2920a30bcf658049 Author: Robert Richter <robert.richter@xxxxxxx> AuthorDate: Tue, 7 Aug 2012 19:43:15 +0200 Committer: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx> CommitDate: Wed, 8 Aug 2012 12:41:53 -0300 perf list: Update documentation about raw event setup It was missing that only certain bit fields are passed to the config value which confused users. Updating it. Signed-off-by: Robert Richter <robert.richter@xxxxxxx> Cc: Ingo Molnar <mingo@xxxxxxxxxx> Link: http://lkml.kernel.org/r/1344361396-7237-6-git-send-email-robert.richter@xxxxxxx Signed-off-by: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx> --- tools/perf/Documentation/perf-list.txt | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/tools/perf/Documentation/perf-list.txt b/tools/perf/Documentation/perf-list.txt index ddc2252..232be51 100644 --- a/tools/perf/Documentation/perf-list.txt +++ b/tools/perf/Documentation/perf-list.txt @@ -15,6 +15,7 @@ DESCRIPTION This command displays the symbolic event types which can be selected in the various perf commands with the -e option. +[[EVENT_MODIFIERS]] EVENT MODIFIERS --------------- @@ -44,6 +45,11 @@ layout of IA32_PERFEVTSELx MSRs (see [Intel® 64 and IA-32 Architectures Softwar of IA32_PERFEVTSELx MSRs) or AMD's PerfEvtSeln (see [AMD64 Architecture Programmer’s Manual Volume 2: System Programming], Page 344, Figure 13-7 Performance Event-Select Register (PerfEvtSeln)). +Note: Only the following bit fields can be set in x86 counter +registers: event, umask, edge, inv, cmask. Esp. guest/host only and +OS/user mode flags must be setup using <<EVENT_MODIFIERS, EVENT +MODIFIERS>>. + Example: If the Intel docs for a QM720 Core i7 describe an event as: -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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