Commit-ID: 3fdbf004c1706480a7c7fac3c9d836fa6df20d7d Gitweb: http://git.kernel.org/tip/3fdbf004c1706480a7c7fac3c9d836fa6df20d7d Author: Andreas Herrmann <andreas.herrmann3@xxxxxxx> AuthorDate: Thu, 30 Sep 2010 14:32:35 +0200 Committer: H. Peter Anvin <hpa@xxxxxxxxxxxxxxx> CommitDate: Fri, 1 Oct 2010 16:18:31 -0700 x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD CPUs Instead of adapting the CPU family check in amd_special_default_mtrr() for each new CPU family assume that all new AMD CPUs support the necessary bits in SYS_CFG MSR. Tom2Enabled is architectural (defined in APM Vol.2). Tom2ForceMemTypeWB is defined in all BKDGs starting with K8 NPT. In pre K8-NPT BKDG this bit is reserved (read as zero). W/o this adaption Linux would unnecessarily complain about bad MTRR settings on every new AMD CPU family, e.g. [ 0.000000] WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 4863MB of RAM. Cc: stable@xxxxxxxxxx # .32.x, .35.x Signed-off-by: Andreas Herrmann <andreas.herrmann3@xxxxxxx> LKML-Reference: <20100930123235.GB20545@xxxxxxxxxxxx> Signed-off-by: H. Peter Anvin <hpa@xxxxxxxxxxxxxxx> --- arch/x86/kernel/cpu/mtrr/cleanup.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c index c5f59d0..ac140c7 100644 --- a/arch/x86/kernel/cpu/mtrr/cleanup.c +++ b/arch/x86/kernel/cpu/mtrr/cleanup.c @@ -827,7 +827,7 @@ int __init amd_special_default_mtrr(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) return 0; - if (boot_cpu_data.x86 < 0xf || boot_cpu_data.x86 > 0x11) + if (boot_cpu_data.x86 < 0xf) return 0; /* In case some hypervisor doesn't pass SYSCFG through: */ if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0) -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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