Re: [PATCH] x86, Calgary: Increase max PHB number
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- Subject: Re: [PATCH] x86, Calgary: Increase max PHB number
- From: "H. Peter Anvin" <hpa@xxxxxxxxx>
- Date: Wed, 30 Jun 2010 16:05:42 -0700
- Cc: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>, mingo@xxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, muli@xxxxxxxxxx, cschultz@xxxxxxxxxxxxxxxxxx, stable@xxxxxxxxxx, tglx@xxxxxxxxxxxxx, mingo@xxxxxxx, linux-tip-commits@xxxxxxxxxxxxxxx
- In-reply-to: <20100630214923.GP15515@xxxxxxxxxxxxxxxxxxxxxx>
- User-agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.10) Gecko/20100621 Fedora/3.0.5-1.fc13 Thunderbird/3.0.5
On 06/30/2010 02:49 PM, Darrick J. Wong wrote:
> Newer systems (x3950M2) can have 48 PHBs per chassis and 4 chassis, so bump the
> limits up and provide an explanation of the requirements for each class. Since
> we can't have more than 256 PCI buses in these systems, we don't need the array
> check.
The 384-entry patch is already upstream. Can you send a patch relative
to current -linus?
-hpa
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