Commit-ID: 4807e3d5dc7bb7057dd6ca3abb09f3da2eb8c323 Gitweb: http://git.kernel.org/tip/4807e3d5dc7bb7057dd6ca3abb09f3da2eb8c323 Author: Peter Zijlstra <a.p.zijlstra@xxxxxxxxx> AuthorDate: Sat, 6 Mar 2010 13:47:07 +0100 Committer: Ingo Molnar <mingo@xxxxxxx> CommitDate: Wed, 10 Mar 2010 13:23:36 +0100 perf, x86: Fix PEBS enable/disable vs cpuc->enabled We should never call ->enable with the pmu enabled, and we _can_ have ->disable called with the pmu enabled. Signed-off-by: Peter Zijlstra <a.p.zijlstra@xxxxxxxxx> Cc: Arnaldo Carvalho de Melo <acme@xxxxxxxxxxxxx> Cc: paulus@xxxxxxxxx Cc: eranian@xxxxxxxxxx Cc: robert.richter@xxxxxxx Cc: fweisbec@xxxxxxxxx LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@xxxxxxx> --- arch/x86/kernel/cpu/perf_event_intel_ds.c | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index 66c6962..9ad0e67 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c @@ -338,7 +338,7 @@ static void intel_pmu_pebs_enable(struct perf_event *event) hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT; val |= 1ULL << hwc->idx; - wrmsrl(MSR_IA32_PEBS_ENABLE, val); + WARN_ON_ONCE(cpuc->enabled); if (x86_pmu.intel_cap.pebs_trap) intel_pmu_lbr_enable(event); @@ -351,7 +351,8 @@ static void intel_pmu_pebs_disable(struct perf_event *event) u64 val = cpuc->pebs_enabled; val &= ~(1ULL << hwc->idx); - wrmsrl(MSR_IA32_PEBS_ENABLE, val); + if (cpuc->enabled) + wrmsrl(MSR_IA32_PEBS_ENABLE, val); hwc->config |= ARCH_PERFMON_EVENTSEL_INT; -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
|