On Tue, Mar 2, 2010 at 3:31 PM, tip-bot for Peter Zijlstra
<a.p.zijlstra@xxxxxxxxx> wrote:
>
> Commit-ID: b622d644c7d61a5cb95b74e7b143c263bed21f0a
> Gitweb: http://git.kernel.org/tip/b622d644c7d61a5cb95b74e7b143c263bed21f0a
> Author: Peter Zijlstra <a.p.zijlstra@xxxxxxxxx>
> AuthorDate: Mon, 1 Feb 2010 15:36:30 +0100
> Committer: Ingo Molnar <mingo@xxxxxxx>
> CommitDate: Tue, 2 Mar 2010 15:06:47 +0100
>
> perf_events, x86: Fixup fixed counter constraints
>
> Patch 1da53e0230 ("perf_events, x86: Improve x86 event scheduling")
> lost us one of the fixed purpose counters and then ed8777fc13
> ("perf_events, x86: Fix event constraint masks") broke it even
> further.
>
> Widen the fixed event mask to event+umask and specify the full config
> for each of the 3 fixed purpose counters. Then let the init code fill
> out the placement for the GP regs based on the cpuid info.
>
> Signed-off-by: Peter Zijlstra <a.p.zijlstra@xxxxxxxxx>
> Cc: Stephane Eranian <eranian@xxxxxxxxxx>
> LKML-Reference: <new-submission>
> Signed-off-by: Ingo Molnar <mingo@xxxxxxx>
> static struct event_constraint intel_core2_event_constraints[] =
> {
> - FIXED_EVENT_CONSTRAINT(0xc0, (0x3|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
> - FIXED_EVENT_CONSTRAINT(0x3c, (0x3|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
> + FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
> + FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
> + /*
> + * Core2 has Fixed Counter 2 listed as CPU_CLK_UNHALTED.REF and event
> + * 0x013c as CPU_CLK_UNHALTED.BUS and specifies there is a fixed
> + * ratio between these counters.
> + */
> + /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
> INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */
> INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */
> INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */
> @@ -37,14 +43,16 @@ static struct event_constraint intel_core2_event_constraints[] =
> INTEL_EVENT_CONSTRAINT(0x18, 0x1), /* IDLE_DURING_DIV */
> INTEL_EVENT_CONSTRAINT(0x19, 0x2), /* DELAYED_BYPASS */
> INTEL_EVENT_CONSTRAINT(0xa1, 0x1), /* RS_UOPS_DISPATCH_CYCLES */
> + INTEL_EVENT_CONSTRAINT(0xc9, 0x1), /* ITLB_MISS_RETIRED (T30-9) */
Where does the constraint on ITLB_MISS_RETIRED come from?
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