Commit-ID: 3ccdccfadbd2548abe38682b587f4ba27eac2fc9 Gitweb: http://git.kernel.org/tip/3ccdccfadbd2548abe38682b587f4ba27eac2fc9 Author: Andi Kleen <andi@xxxxxxxxxxxxxx> AuthorDate: Thu, 9 Jul 2009 00:31:45 +0200 Committer: H. Peter Anvin <hpa@xxxxxxxxx> CommitDate: Thu, 9 Jul 2009 18:39:47 -0700 x86: mce: Lower maximum number of banks to architecture limit The Intel x86 architecture right now only supports 32 machine check banks, more would bump into other MSRs. So lower the max define to 32. This only affects a few bitmaps, most data structures are dynamically sized anyways. Signed-off-by: Andi Kleen <ak@xxxxxxxxxxxxxxx> Signed-off-by: H. Peter Anvin <hpa@xxxxxxxxx> --- arch/x86/include/asm/mce.h | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 6b8a974..ad75353 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -130,10 +130,11 @@ void mce_log(struct mce *m); DECLARE_PER_CPU(struct sys_device, mce_dev); /* - * To support more than 128 would need to escape the predefined - * Linux defined extended banks first. + * Maximum banks number. + * This is the limit of the current register layout on + * Intel CPUs. */ -#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1) +#define MAX_NR_BANKS 32 #ifdef CONFIG_X86_MCE_INTEL extern int mce_cmci_disabled; -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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