* Mathieu Desnoyers <mathieu.desnoyers@xxxxxxxxxx> wrote: > In the category "crazy ideas one should never express out loud", I > could add the following. We could choose to save/restore the cr2 > register on the local stack at every interrupt entry/exit, and > therefore allow the page fault handler to execute with interrupts > enabled. > > I have not benchmarked the interrupt disabling overhead of the > page fault handler handled by starting an interrupt-gated handler > rather than trap-gated handler, but cli/sti instructions are known > to take quite a few cycles on some architectures. e.g. 131 cycles > for the pair on P4, 23 cycles on AMD Athlon X2 64, 43 cycles on > Intel Core2. > > I am tempted to think that taking, say, ~10 cycles on the > interrupt path worths it if we save a few tens of cycles on the > page fault handler fast path. > > But again, this calls for benchmarks. One absolutely non-trivial complication with such a scheme would be preemptability: if we enter #PF with irqs enabled then it's immediately preemptible on CONFIG_PREEMPT=y. The scheduler would switch away to another context and the cr2 value is lost before it has been read out. This means an additional collateral damage to context-switch cr2. (which might still be worth it given that context-switches are a less hot codepath than pagefaults - but an additional complicaton.) The ideal solution would be for the CPU to atomically push the cr2 value to the #PF hardware stack, alongside the error code it already pushes there. Ingo -- To unsubscribe from this list: send the line "unsubscribe linux-tip-commits" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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