Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support to use NMI-safe methods

["H. Peter Anvin" <hpa@xxxxxxxxx>]

Mathieu Desnoyers wrote:
> 
> In the category "crazy ideas one should never express out loud", I could add the
> following. We could choose to save/restore the cr2 register on the local stack
> at every interrupt entry/exit, and therefore allow the page fault handler to
> execute with interrupts enabled.
> 
> I have not benchmarked the interrupt disabling overhead of the page fault
> handler handled by starting an interrupt-gated handler rather than trap-gated 
> handler, but cli/sti instructions are known to take quite a few cycles on some
> architectures. e.g. 131 cycles for the pair on P4, 23 cycles on AMD Athlon X2
> 64, 43 cycles on Intel Core2.
> 
> I am tempted to think that taking, say, ~10 cycles on the interrupt path worths
> it if we save a few tens of cycles on the page fault handler fast path.
> 

Doesn't sound all that crazy, I suspect the underlying assumption that
interrupt gates are slower than trap gates is incorrect.  Disabling
interrupts itself isn't expensive, it's the synchronization requirements.

	-hpa

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