Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support to use NMI-safe methods
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- Subject: Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support to use NMI-safe methods
- From: "H. Peter Anvin" <hpa@xxxxxxxxx>
- Date: Mon, 15 Jun 2009 12:11:20 -0700
- Cc: Mathieu Desnoyers <mathieu.desnoyers@xxxxxxxxxx>, Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>, Ingo Molnar <mingo@xxxxxxx>, mingo@xxxxxxxxxx, paulus@xxxxxxxxx, acme@xxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, penberg@xxxxxxxxxxxxxx, vegard.nossum@xxxxxxxxx, efault@xxxxxx, jeremy@xxxxxxxx, npiggin@xxxxxxx, tglx@xxxxxxxxxxxxx, linux-tip-commits@xxxxxxxxxxxxxxx
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Peter Zijlstra wrote:
> On Mon, 2009-06-15 at 14:59 -0400, Mathieu Desnoyers wrote:
>> * Peter Zijlstra (a.p.zijlstra@xxxxxxxxx) wrote:
>>> On Mon, 2009-06-15 at 14:48 -0400, Mathieu Desnoyers wrote:
>>>> we should not care that much about the performance hit of
>>>> saving/restoring the cr2 register at each nmi entry/exit.
>>> But we do, perf counters very much cares about nmi performance.
>>>
>> To a point where it cannot afford a simple register save/restore ?
>>
>> There is "caring" and "_caring_". I am tempted to ask what NMI handler
>> execution frequency you have in mind here to figure out if we are not
>> trying to optimize sub-nanoseconds per minutes. ;)
>
> Ah, well, I have no idea who expensive cr2 is, if its like a regular
> register then it should be fine. If however its tons more expensive then
> we should really avoid it.
>
> As to the freq, 100kHz would be nice ;-)
>
Writing control registers is serializing, so it's a lot more expensive
than writing a normal register; my *guess* is that it will be on the
order of 100-200 cycles.
That is not based on any actual information.
-hpa
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