Commit-ID: 7bb497bd885eedd0f56dfe3cc1b5ff20710d33b9
Gitweb: http://git.kernel.org/tip/7bb497bd885eedd0f56dfe3cc1b5ff20710d33b9
Author: Ingo Molnar <mingo@xxxxxxx>
AuthorDate: Wed, 18 Mar 2009 08:59:21 +0100
Committer: Ingo Molnar <mingo@xxxxxxx>
CommitDate: Mon, 6 Apr 2009 09:30:14 +0200
perf_counter: fix crash on perfmon v1 systems
Impact: fix boot crash on Intel Perfmon Version 1 systems
Intel Perfmon v1 does not support the global MSRs, nor does
it offer the generalized MSR ranges. So support v2 and later
CPUs only.
Also mark pmc_ops as read-mostly - to avoid false cacheline
sharing.
Cc: Paul Mackerras <paulus@xxxxxxxxx>
Cc: Peter Zijlstra <a.p.zijlstra@xxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxx>
---
arch/x86/kernel/cpu/perf_counter.c | 16 +++++++++++-----
1 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 22dab06..6cba9d4 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -57,12 +57,14 @@ struct pmc_x86_ops {
int max_events;
};
-static struct pmc_x86_ops *pmc_ops;
+static struct pmc_x86_ops *pmc_ops __read_mostly;
static DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters) = {
.enabled = 1,
};
+static __read_mostly int intel_perfmon_version;
+
/*
* Intel PerfMon v3. Used on Core2 and later.
*/
@@ -613,7 +615,7 @@ void perf_counter_print_debug(void)
cpu = smp_processor_id();
cpuc = &per_cpu(cpu_hw_counters, cpu);
- if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
+ if (intel_perfmon_version >= 2) {
rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);
rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);
rdmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow);
@@ -930,10 +932,10 @@ static struct pmc_x86_ops pmc_amd_ops = {
static struct pmc_x86_ops *pmc_intel_init(void)
{
+ union cpuid10_edx edx;
union cpuid10_eax eax;
- unsigned int ebx;
unsigned int unused;
- union cpuid10_edx edx;
+ unsigned int ebx;
/*
* Check whether the Architectural PerfMon supports
@@ -943,8 +945,12 @@ static struct pmc_x86_ops *pmc_intel_init(void)
if (eax.split.mask_length <= ARCH_PERFMON_BRANCH_MISSES_RETIRED)
return NULL;
+ intel_perfmon_version = eax.split.version_id;
+ if (intel_perfmon_version < 2)
+ return NULL;
+
pr_info("Intel Performance Monitoring support detected.\n");
- pr_info("... version: %d\n", eax.split.version_id);
+ pr_info("... version: %d\n", intel_perfmon_version);
pr_info("... bit width: %d\n", eax.split.bit_width);
pr_info("... mask length: %d\n", eax.split.mask_length);
--
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