The Tegra UTC (UART Trace Controller) allows multiple clients within the Tegra SoC to share a physical UART interface. It supports up to 16 clients. Each client operates as an independent UART endpoint with a dedicated interrupt and 128-character TX/RX FIFOs. Add device tree binding documentation for the Tegra UTC client. Signed-off-by: Kartik Rajput <kkartik@xxxxxxxxxx> --- v1 -> v2: * Removed current-speed as it might not be accurate as the Tegra UTC multiplex data from various clients. * Use 'tx-threshold' and 'rx-threshold' properties defined in serial.yaml instead of 'nvidia,utc-fifo-threshold'. * Add serial.yaml reference. * Define minimum and maximum values for threshold. * Rephrase the documentation to clarify that we are documenting the Tegra UTC clients and not the controller itself. --- .../bindings/serial/nvidia,tegra264-utc.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml b/Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml new file mode 100644 index 000000000000..572cc574da64 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/nvidia,tegra264-utc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra UTC (UART Trace Controller) client + +maintainers: + - Kartik Rajput <kkartik@xxxxxxxxxx> + - Thierry Reding <thierry.reding@xxxxxxxxx> + - Jonathan Hunter <jonathanh@xxxxxxxxxx> + +description: + Represents a client interface of the Tegra UTC (UART Trace Controller). The + Tegra UTC allows multiple clients within the Tegra SoC to share a physical + UART interface. It supports up to 16 clients. Each client operates as an + independent UART endpoint with a dedicated interrupt and 128-character TX/RX + FIFOs. + + The Tegra UTC clients use 8-N-1 configuration and operates on a baudrate + configured by the bootloader at the controller level. + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + const: nvidia,tegra264-utc + + reg: + items: + - description: TX region. + - description: RX region. + + reg-names: + items: + - const: tx + - const: rx + + interrupts: + maxItems: 1 + + tx-threshold: + minimum: 1 + maximum: 128 + + rx-threshold: + minimum: 1 + maximum: 128 + +required: + - compatible + - reg + - reg-names + - interrupts + - tx-threshold + - rx-threshold + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + tegra_utc: serial@c4e0000 { + compatible = "nvidia,tegra264-utc"; + reg = <0xc4e0000 0x8000>, <0xc4e8000 0x8000>; + reg-names = "tx", "rx"; + interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; + tx-threshold = <4>; + rx-threshold = <4>; + }; -- 2.43.0
