On Tue, 7 Jan 2025 16:24:59 -0500 Parker Newman wrote: > Nvidia's Tegra MGBE controllers require the IOMMU "Stream ID" (SID) to be > written to the MGBE_WRAP_AXI_ASID0_CTRL register. > > The current driver is hard coded to use MGBE0's SID for all controllers. > This causes softirq time outs and kernel panics when using controllers > other than MGBE0. Applied, thanks!
