NVIDIA's Tegra241 (Grace) SoC has a CMDQ-Virtualization (CMDQV) hardware that extends standard ARM SMMUv3 to support multiple command queues with virtualization capabilities. Though this is similar to the ECMDQ in SMMU v3.3, CMDQV provides additional Virtual Interfaces (VINTFs) allowing VMs to have their own VINTFs and Virtual Command Queues (VCMDQs). The VCMDQs can only execute a limited set of commands, mainly invalidation commands when exclusively used by the VMs, compared to the standard SMMUv3 CMDQ. Thus, there are two parts of patch series to add its support: the basic in-kernel support as part 1, and the user-space support as part 2. The in-kernel support is to detect/configure the CMDQV hardware and then allocate a VINTF with some VCMDQs for the kernel/hypervisor to use. Like ECMDQ, CMDQV also allows the kernel to use multiple VCMDQs, giving some limited performance improvement: up to 20% reduction of TLB invalidation time was measured by a multi-threaded DMA unmap benchmark, compared to a single queue. The user-space support is to provide uAPIs (via IOMMUFD) for hypervisors in user space to passthrough VCMDQs to VMs, allowing these VMs to access the VCMDQs directly without trappings, i.e. no VM Exits. This gives huge performance improvements: 70% to 90% reductions of TLB invalidation time were measured by various DMA unmap tests running in a guest OS, compared to a nested SMMU CMDQ (with trappings). This is the part-1 series: - Preparatory changes to share the existing SMMU functions - A new CMDQV driver and extending the SMMUv3 driver to interact with the new driver - Limit the commands for a guest kernel. It's available on Github: https://github.com/nicolinc/iommufd/commits/vcmdq_in_kernel-v13 And the part-2 RFC series is also sent for discussion: https://lore.kernel.org/all/cover.1712978212.git.nicolinc@xxxxxxxxxx/ Note that this in-kernel support isn't confined to host kernels running on Grace-powered servers, but is also used by guest kernels running on VMs virtualized on those servers. So, those VMs must install the driver, ideally before the part 2 is merged. So, later those servers would only need to upgrade their host kernels without bothering the VMs. Thank you! Changelog v13: * Rebased on 6.11-rc4 * Fixed the lidx calculation in the isr() * Dropped the arm_smmu_get_iort_node from v12 * Dropped the WARN_ON_ONCE in arm_smmu_cmdq_batch_init() * Replaced ARM_SMMU_OPT_SECONDARY_CMDQ_CS_NONE_ONLY with ARM_SMMU_OPT_TEGRA241_CMDQV for impl-level probe * Split the minimal cmdqv dsdt probe part from the tegra241_cmdqv to the common driver since it might run on other platforms too * Added an impl_dev to forward the device node to cmdqv driver so it can use it for prints and HW resources probe * Switched to the open-code approach provided by Will, replacing the patch "Enforce arm_smmu_cmdq_build_sync_cmd" * Added a supports_cmd op in the struct arm_smmu_cmdq, so as to scan the command at each arm_smmu_cmdq_batch_add call v12: https://lore.kernel.org/all/cover.1723754745.git.nicolinc@xxxxxxxxxx/ * Rebased on 6.11-rc3 * Added Jason's Reviewed-by * Added an arm_smmu_impl_probe helper * Added an arm_smmu_get_iort_node helper * Slightly updated the CMDQV acpi probe() * Added a static_assert() for smmu in struct tegra241_cmdqv v11: https://lore.kernel.org/all/cover.1722993435.git.nicolinc@xxxxxxxxxx/ * Rebased on 6.11-rc2 * Fixed "vtinfs" typo in kdoc * Maxed out the max_n_shift to hardware allowed value v10: https://lore.kernel.org/all/cover.1722206275.git.nicolinc@xxxxxxxxxx/ * Rebased on 6.11-rc1 * Added impl design mimicing arm-smmu (v2) driver * Replaced the CS_NONE quirk with a new smmu option * Fixed misaligned 64-bit register reading in the isr() * Explicitly assign opcode to arm_smmu_cmdq_batch_init() where cmd/ent might potentially not be initialized. v9: https://lore.kernel.org/all/cover.1718228494.git.nicolinc@xxxxxxxxxx/ * Rebased on 6.10-rc3 * Replaced "base + offset" in write_config() with REG helpers * Added "Reviewed-by" line from Jason, to the remaining PATCH-5 v8: https://lore.kernel.org/all/cover.1716883239.git.nicolinc@xxxxxxxxxx/ * Added "Reviewed-by" lines from Jason * Replaced memset with a simple "cmd[1] = 0" * Replaced MMIO read/write helpers with REG_* macros * Dropped the racy static string in lvcmdq_error_header() * Added a few lines of comments to arm_smmu_get_cmdq at the line calling tegra241_cmdqv_get_cmdq() v7: https://lore.kernel.org/all/cover.1715147377.git.nicolinc@xxxxxxxxxx/ * Moved all public symbols into one single patch * Enforced a command batch to use the same cmdq * Enforced the use of arm_smmu_cmdq_build_sync_cmd() * Reworked the tegra241-cmdqv driver patch - Dropped logging macros, cmdqv->dev, and atomic - Dropped devm_* and added tegra241_cmdqv_device_remove() - Moved all structure allocations to cmdqv's probe() from device_reset() where only register configurations remains - Switched the config macros to inline functions - Optimized ISR routine with 64-bit reading MMIO - Scan once per batch against command list - Reorganized function locations - Minor readability changes v6: https://lore.kernel.org/all/cover.1714451595.git.nicolinc@xxxxxxxxxx/ * Reordered the patch sequence to fix git-bisect break * Added a status cache to cmdqv/vintf/vcmdq structure * Added gerror/gerrorn value match in hw_deinit() * Minimized changes in __arm_smmu_cmdq_skip_err() * Preallocated VCMDQs to VINTFs for stablility v5: https://lore.kernel.org/all/cover.1712977210.git.nicolinc@xxxxxxxxxx/ * Improved print/mmio helpers * Added proper register reset routines * Reorganized init/deinit functions to share with VIOMMU callbacks in the upcoming part-2 user-space series (RFC) v4: https://lore.kernel.org/all/cover.1711690673.git.nicolinc@xxxxxxxxxx/ * Rebased on v6.9-rc1 * Renamed to "tegra241-cmdqv", following other Grace kernel patches * Added a set of print and MMIO helpers * Reworked the guest limitation patch v3: https://lore.kernel.org/all/20211119071959.16706-1-nicolinc@xxxxxxxxxx/ * Dropped VMID and mdev patches to redesign later based on IOMMUFD * Separated HYP_OWN part for guest support into a new patch * Added new preparatory changes v2: https://lore.kernel.org/all/20210831025923.15812-1-nicolinc@xxxxxxxxxx/ * Added mdev interface support for hypervisor and VMs * Added preparatory changes for mdev interface implementation * PATCH-12 Changed ->issue_cmdlist() to ->get_cmdq() for a better integration with recently merged ECMDQ-related changes v1: https://lore.kernel.org/all/20210723193140.9690-1-nicolinc@xxxxxxxxxx/ Jason Gunthorpe (1): iommu/arm-smmu-v3: Add struct arm_smmu_impl_ops Nate Watterson (1): iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV Nicolin Chen (8): iommu/arm-smmu-v3: Issue a batch of commands to the same cmdq iommu/arm-smmu-v3: Pass in cmdq pointer to arm_smmu_cmdq_build_sync_cmd iommu/arm-smmu-v3: Pass in cmdq pointer to arm_smmu_cmdq_init iommu/arm-smmu-v3: Make symbols public for CONFIG_TEGRA241_CMDQV iommu/arm-smmu-v3: Add ARM_SMMU_OPT_TEGRA241_CMDQV iommu/arm-smmu-v3: Add acpi_smmu_acpi_probe_model for impl iommu/arm-smmu-v3: Start a new batch if new command is not supported iommu/tegra241-cmdqv: Limit CMDs for VCMDQs of a guest owned VINTF MAINTAINERS | 1 + drivers/iommu/Kconfig | 11 + drivers/iommu/arm/arm-smmu-v3/Makefile | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 201 +++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 40 + .../iommu/arm/arm-smmu-v3/tegra241-cmdqv.c | 889 ++++++++++++++++++ 6 files changed, 1100 insertions(+), 43 deletions(-) create mode 100644 drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c -- 2.43.0
