On Mon, Jul 08, 2024 at 12:43:26PM +0100, Will Deacon wrote: > External email: Use caution opening links or attachments > > > On Mon, Jul 08, 2024 at 12:29:28PM +0100, Will Deacon wrote: > > On Fri, Jul 05, 2024 at 11:10:42AM -0700, Nicolin Chen wrote: > > > But if you insist on having an smmu option, we still have to take in the > > > PATCH-3 in this series, enforcing an arm_smmu_cmdq_build_sync_cmd() call > > > in the IRQ handler too. So, it would eventually look like [attachment]. > > > > With my hacks, I think you can just call arm_smmu_cmdq_build_sync_cmd() > > from the irqhandler and it will work. > > Hmm, actually, that will mean we end up using MSIs for the error case on > hardware which supports it, which is a strange change in behaviour. Yes. I highlighted the smae in the commit log of PATCH-3: iommu/arm-smmu-v3: Enforce arm_smmu_cmdq_build_sync_cmd Do you foresee some potential risk of doing that? > What does your hardware do if it sees SIG_SEV in a CMD_SYNC? Is it just > a case of failing to generate the event on completion, or does it treat > it as an invalid opcode? That would be an invalid opcode. Thanks Nicolin
