On Fri, Jun 28, 2024 at 09:26:00PM +0200, Pavel Machek wrote: > Hi! > > > NVIDIA's Tegra241 (Grace) SoC has a CMDQ-Virtualization (CMDQV) hardware > > that extends standard ARM SMMUv3 to support multiple command queues with > > virtualization capabilities. Though this is similar to the ECMDQ in SMMU > > v3.3, CMDQV provides additional Virtual Interfaces (VINTFs) allowing VMs > > to have their own VINTFs and Virtual Command Queues (VCMDQs). The VCMDQs > > can only execute a limited set of commands, mainly invalidation commands > > when exclusively used by the VMs, compared to the standard SMMUv3 CMDQ. > > Text is block-aligned without duplicated spaces. How did you do > that...? By OCD? Nothing fancy :) Thanks Nicolin