On Fri, Feb 16, 2024 at 04:49:08PM +0530, Manivannan Sadhasivam wrote:
> On Sat, Feb 10, 2024 at 02:26:25AM +0100, Niklas Cassel wrote:
> > The hardware description for BARs is scattered in many different variables
> > in pci_epc_features. Some of these things are mutually exclusive, so it
> > can create confusion over which variable that has precedence over another.
> >
> > Improve the situation by creating a struct pci_epc_bar_desc, and a new
> > enum pci_epc_bar_type, and convert the endpoint controller drivers to use
> > this more well defined format.
> >
> > Signed-off-by: Niklas Cassel <cassel@xxxxxxxxxx>
> > ---
> > drivers/pci/controller/dwc/pci-imx6.c | 3 +-
> > drivers/pci/controller/dwc/pci-keystone.c | 12 +++----
> > .../pci/controller/dwc/pci-layerscape-ep.c | 5 ++-
> > drivers/pci/controller/dwc/pcie-keembay.c | 8 +++--
> > drivers/pci/controller/dwc/pcie-rcar-gen4.c | 4 ++-
> > drivers/pci/controller/dwc/pcie-tegra194.c | 10 ++++--
> > drivers/pci/controller/dwc/pcie-uniphier-ep.c | 15 ++++++--
> > drivers/pci/controller/pcie-rcar-ep.c | 14 +++++---
> > drivers/pci/endpoint/functions/pci-epf-ntb.c | 4 +--
> > drivers/pci/endpoint/functions/pci-epf-test.c | 8 ++---
> > drivers/pci/endpoint/functions/pci-epf-vntb.c | 2 +-
> > drivers/pci/endpoint/pci-epc-core.c | 32 +++++++++--------
> > drivers/pci/endpoint/pci-epf-core.c | 15 ++++----
> > include/linux/pci-epc.h | 34 +++++++++++++++----
> > 14 files changed, 108 insertions(+), 58 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> > index dc2c036ab28c..47a9a96484ed 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -1081,7 +1081,8 @@ static const struct pci_epc_features imx8m_pcie_epc_features = {
> > .linkup_notifier = false,
> > .msi_capable = true,
> > .msix_capable = false,
> > - .reserved_bar = 1 << BAR_1 | 1 << BAR_3,
> > + .bar[BAR_1] = { .type = BAR_RESERVED, },
> > + .bar[BAR_3] = { .type = BAR_RESERVED, },
> > .align = SZ_64K,
> > };
> >
> > diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
> > index c0c62533a3f1..b2b93b4fa82d 100644
> > --- a/drivers/pci/controller/dwc/pci-keystone.c
> > +++ b/drivers/pci/controller/dwc/pci-keystone.c
> > @@ -924,12 +924,12 @@ static const struct pci_epc_features ks_pcie_am654_epc_features = {
> > .linkup_notifier = false,
> > .msi_capable = true,
> > .msix_capable = true,
> > - .reserved_bar = 1 << BAR_0 | 1 << BAR_1,
> > - .bar_fixed_64bit = 1 << BAR_0,
> > - .bar_fixed_size[2] = SZ_1M,
> > - .bar_fixed_size[3] = SZ_64K,
> > - .bar_fixed_size[4] = 256,
> > - .bar_fixed_size[5] = SZ_1M,
> > + .bar[BAR_0] = { .type = BAR_RESERVED, .only_64bit = true, },
> > + .bar[BAR_1] = { .type = BAR_RESERVED, },
> > + .bar[BAR_2] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
> > + .bar[BAR_3] = { .type = BAR_FIXED, .fixed_size = SZ_64K, },
> > + .bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = 256, },
> > + .bar[BAR_5] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
> > .align = SZ_1M,
> > };
> >
> > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > index 2e398494e7c0..1f6ee1460ec2 100644
> > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > @@ -250,7 +250,10 @@ static int __init ls_pcie_ep_probe(struct platform_device *pdev)
> > pci->dev = dev;
> > pci->ops = pcie->drvdata->dw_pcie_ops;
> >
> > - ls_epc->bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4);
> > + ls_epc->bar[BAR_2].only_64bit = true;
> > + ls_epc->bar[BAR_3].type = BAR_RESERVED;
>
> BAR_3 and BAR_4 were not reserved previously.
>
Okay, looking at patch 2 makes it clear why you have marked it as such. But it
should've been mentioned in the commit message.
- Mani
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