Re: [bug report] dmaengine: tegra210-adma: Support dma-channel-mask property

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On 13-12-2023 12:07, Dan Carpenter wrote:
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Hello Mohan Kumar,

The patch 25b636225a08: "dmaengine: tegra210-adma: Support
dma-channel-mask property" from Nov 28, 2023 (linux-next), leads to
the following Smatch static checker warning:

         drivers/dma/tegra210-adma.c:887 tegra_adma_probe()
         warn: passing casted pointer 'tdma->dma_chan_mask' to 'of_property_read_u32_array()' 64 vs 32.

drivers/dma/tegra210-adma.c
     845 static int tegra_adma_probe(struct platform_device *pdev)
     846 {
     847         const struct tegra_adma_chip_data *cdata;
     848         struct tegra_adma *tdma;
     849         int ret, i;
     850
     851         cdata = of_device_get_match_data(&pdev->dev);
     852         if (!cdata) {
     853                 dev_err(&pdev->dev, "device match data not found\n");
     854                 return -ENODEV;
     855         }
     856
     857         tdma = devm_kzalloc(&pdev->dev,
     858                             struct_size(tdma, channels, cdata->nr_channels),
     859                             GFP_KERNEL);
     860         if (!tdma)
     861                 return -ENOMEM;
     862
     863         tdma->dev = &pdev->dev;
     864         tdma->cdata = cdata;
     865         tdma->nr_channels = cdata->nr_channels;
     866         platform_set_drvdata(pdev, tdma);
     867
     868         tdma->base_addr = devm_platform_ioremap_resource(pdev, 0);
     869         if (IS_ERR(tdma->base_addr))
     870                 return PTR_ERR(tdma->base_addr);
     871
     872         tdma->ahub_clk = devm_clk_get(&pdev->dev, "d_audio");
     873         if (IS_ERR(tdma->ahub_clk)) {
     874                 dev_err(&pdev->dev, "Error: Missing ahub controller clock\n");
     875                 return PTR_ERR(tdma->ahub_clk);
     876         }
     877
     878         tdma->dma_chan_mask = devm_kzalloc(&pdev->dev,
     879                                            BITS_TO_LONGS(tdma->nr_channels) * sizeof(unsigned long),
     880                                            GFP_KERNEL);
     881         if (!tdma->dma_chan_mask)
     882                 return -ENOMEM;
     883
     884         /* Enable all channels by default */
     885         bitmap_fill(tdma->dma_chan_mask, tdma->nr_channels);
     886
--> 887         ret = of_property_read_u32_array(pdev->dev.of_node, "dma-channel-mask",
     888                                          (u32 *)tdma->dma_chan_mask,

I don't think this will work on big endian systems...  Do we care about
that?
We don't care for big endian, as all the Tegra chip which is supported by this adma driver is little endian. If you still have any concern we need to re-look on the typecasting logic.

     889                                          BITS_TO_U32(tdma->nr_channels));
     890         if (ret < 0 && (ret != -EINVAL)) {
     891                 dev_err(&pdev->dev, "dma-channel-mask is not complete.\n");
     892                 return ret;
     893         }
     894
     895         INIT_LIST_HEAD(&tdma->dma_dev.channels);
     896         for (i = 0; i < tdma->nr_channels; i++) {
     897                 struct tegra_adma_chan *tdc = &tdma->channels[i];
     898
     899                 /* skip for reserved channels */
     900                 if (!test_bit(i, tdma->dma_chan_mask))
     901                         continue;
     902

regards,
dan carpenter




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