21.06.2023 18:35, Thierry Reding пишет:
> On Tue, Jun 20, 2023 at 12:09:09PM -0700, Stephen Boyd wrote:
>> Quoting Maxime Ripard (2023-06-19 00:26:19)
>>> On Mon, Jun 19, 2023 at 02:38:59AM +0300, Dmitry Osipenko wrote:
>>>> 05.05.2023 14:26, Maxime Ripard пишет:
>>>>>
>>>>> diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c
>>>>> index 3f3a7a203c5f..7ec47942720c 100644
>>>>> --- a/drivers/clk/tegra/clk-super.c
>>>>> +++ b/drivers/clk/tegra/clk-super.c
>>>>> @@ -142,15 +142,22 @@ static const struct clk_ops tegra_clk_super_mux_ops = {
>>>>> .restore_context = clk_super_mux_restore_context,
>>>>> };
>>>>>
>>>>> -static long clk_super_round_rate(struct clk_hw *hw, unsigned long rate,
>>>>> - unsigned long *parent_rate)
>>>>> +static int clk_super_determine_rate(struct clk_hw *hw,
>>>>> + struct clk_rate_request *req)
>>>>> {
>>>>> struct tegra_clk_super_mux *super = to_clk_super_mux(hw);
>>>>> struct clk_hw *div_hw = &super->frac_div.hw;
>>>>> + unsigned long rate;
>>>>>
>>>>> __clk_hw_set_clk(div_hw, hw);
>>>>>
>>>>> - return super->div_ops->round_rate(div_hw, rate, parent_rate);
>>>>> + rate = super->div_ops->round_rate(div_hw, req->rate,
>>>>> + &req->best_parent_rate);
>>>>> + if (rate < 0)
>>
>> There's the report that this condition is never possible. Maybe the
>> previous code was relying on an error value sometimes. Can we add
>> determine_rate to the div_ops and simplify this code? I asked on the
>> list for that earlier.
>
> I was able to reproduce this on a Tegra30 Beaver, but the problem is
> more straightforward than this. The crash I was seeing during boot was
> because cclk_super_determine_rate() was still calling the round_rate()
> callback from tegra_clk_super_ops, which this patch removed (and added
> determine_rate() instead).
>
> The following fixes the problem for me. It's basically converting the
> round_rate() call to an equivalent determine_rate() call.
>
> Dmitry, can you verify that this fixes the issue that you were seeing?
>
> Thierry
>
> --- >8 ---
> diff --git a/drivers/clk/tegra/clk-tegra-super-cclk.c b/drivers/clk/tegra/clk-tegra-super-cclk.c
> index 68d7bcd5fc8a..8a2bb4ae4fd2 100644
> --- a/drivers/clk/tegra/clk-tegra-super-cclk.c
> +++ b/drivers/clk/tegra/clk-tegra-super-cclk.c
> @@ -86,9 +86,16 @@ static int cclk_super_determine_rate(struct clk_hw *hw,
> if (rate <= pllp_rate) {
> if (super->flags & TEGRA20_SUPER_CLK)
> rate = pllp_rate;
> - else
> - rate = tegra_clk_super_ops.round_rate(hw, rate,
> - &pllp_rate);
> + else {
> + struct clk_rate_request parent = {
> + .rate = req->rate,
> + .best_parent_rate = pllp_rate,
> + };
> +
> + tegra_clk_super_ops.determine_rate(hw, &parent);
> + pllp_rate = parent.best_parent_rate;
> + rate = parent.rate;
> + }
>
> req->best_parent_rate = pllp_rate;
> req->best_parent_hw = pllp_hw;
> --- >8 ---
Thank you for the fix, it works! Feel free to add my t-b :)
