The current global interrupt clear programming register offset
was not correct. Fix the programming with right offset
fixes: 'commit ded1f3db4cd6
("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")'
Signed-off-by: Mohan Kumar <mkumard@xxxxxxxxxx>
---
drivers/dma/tegra210-adma.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
index ae39b52012b2..487f8fb411b5 100644
--- a/drivers/dma/tegra210-adma.c
+++ b/drivers/dma/tegra210-adma.c
@@ -221,7 +221,9 @@ static int tegra_adma_init(struct tegra_adma *tdma)
int ret;
/* Clear any interrupts */
- tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
+ tdma_write(tdma,
+ tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear,
+ 0x1);
/* Assert soft reset */
tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);
--
2.17.1
