Add driver support for ARM CoreSight PMU device and event attributes for NVIDIA
implementation. The code is based on ARM Coresight PMU architecture and ACPI ARM
Performance Monitoring Unit table (APMT) specification below:
* ARM Coresight PMU:
https://developer.arm.com/documentation/ihi0091/latest
* APMT: https://developer.arm.com/documentation/den0117/latest
The patchset applies on top of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
master next-20220524
For APMT support, please see patchset: https://lkml.org/lkml/2022/4/19/1395
Changes from v4:
* Fix code formatting
* Add timeout to read register function with high-low-high sequence
* Add NO_INTERRUPT capability on PMU that does not have IRQ
* Fix the name of NVIDIA PMUs
* Drop filter attribute for NVLink-C2C PMUs
* Added Reviewed/Acked-by from Suzuki
Thanks to suzuki.poulose@xxxxxxx and will@xxxxxxxxxx for the review comments.
v4: https://lore.kernel.org/linux-arm-kernel/20220814182351.8861-1-bwicaksono@xxxxxxxxxx/
Changes from v3:
* Driver is now probing "arm-cs-arch-pmu" device.
* The driver files, directory, functions are renamed with "arm_cspmu" prefix.
* Use Kconfig ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU.
* Add kernel doc for NVIDIA Uncore PMU.
* Use GENMASK and FIELD_GET macros everywhere.
Thanks to suzuki.poulose@xxxxxxx and will@xxxxxxxxxx for the review comments.
v3: https://lore.kernel.org/linux-arm-kernel/20220621055035.31766-1-bwicaksono@xxxxxxxxxx/
Changes from v2:
* Driver is now probing "arm-system-pmu" device.
* Change default PMU naming to "arm_<APMT node type>_pmu".
* Add implementor ops to generate custom name.
Thanks to suzuki.poulose@xxxxxxx for the review comments.
v2: https://lore.kernel.org/linux-arm-kernel/20220515163044.50055-1-bwicaksono@xxxxxxxxxx/
Changes from v1:
* Remove CPU arch dependency.
* Remove 32-bit read/write helper function and just use read/writel.
* Add .is_visible into event attribute to filter out cycle counter event.
* Update pmiidr matching.
* Remove read-modify-write on PMCR since the driver only writes to PMCR.E.
* Assign default cycle event outside the 32-bit PMEVTYPER range.
* Rework the active event and used counter tracking.
Thanks to robin.murphy@xxxxxxx for the review comments.
v1: https://lore.kernel.org/linux-arm-kernel/20220509002810.12412-1-bwicaksono@xxxxxxxxxx/
Besar Wicaksono (2):
perf: arm_cspmu: Add support for ARM CoreSight PMU driver
perf: arm_cspmu: Add support for NVIDIA SCF and MCF attribute
Documentation/admin-guide/perf/index.rst | 1 +
Documentation/admin-guide/perf/nvidia-pmu.rst | 299 ++++
arch/arm64/configs/defconfig | 1 +
drivers/perf/Kconfig | 2 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_cspmu/Kconfig | 13 +
drivers/perf/arm_cspmu/Makefile | 7 +
drivers/perf/arm_cspmu/arm_cspmu.c | 1285 +++++++++++++++++
drivers/perf/arm_cspmu/arm_cspmu.h | 151 ++
drivers/perf/arm_cspmu/nvidia_cspmu.c | 398 +++++
drivers/perf/arm_cspmu/nvidia_cspmu.h | 17 +
11 files changed, 2175 insertions(+)
create mode 100644 Documentation/admin-guide/perf/nvidia-pmu.rst
create mode 100644 drivers/perf/arm_cspmu/Kconfig
create mode 100644 drivers/perf/arm_cspmu/Makefile
create mode 100644 drivers/perf/arm_cspmu/arm_cspmu.c
create mode 100644 drivers/perf/arm_cspmu/arm_cspmu.h
create mode 100644 drivers/perf/arm_cspmu/nvidia_cspmu.c
create mode 100644 drivers/perf/arm_cspmu/nvidia_cspmu.h
base-commit: 09ce5091ff971cdbfd67ad84dc561ea27f10d67a
--
2.17.1
