On Mon, 27 Jun 2022 17:19:55 +0300, Mikko Perttunen wrote: > From: Mikko Perttunen <mperttunen@xxxxxxxxxx> > > Update VIC and Host1x bindings for changes in Tegra234. > > Namely, > - New compatible strings > - Sharded syncpoint interrupts > - Optional reset. > > Also, fix the order of descriptions for VM/hypervisor > register apertures -- while the reg-names specification > was correct, the descriptions for these were switched. > > Signed-off-by: Mikko Perttunen <mperttunen@xxxxxxxxxx> > --- > v2: > * Add back 'required' for resets/reset-names on older SoCs > * Simplified reg descriptions > * Updated commit message > v3: > * Split out bracketing change in example > --- > .../display/tegra/nvidia,tegra124-vic.yaml | 1 + > .../display/tegra/nvidia,tegra20-host1x.yaml | 106 +++++++++++++++--- > 2 files changed, 93 insertions(+), 14 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
