Tegra234 has a total of 11 PCIe controllers based on Synopsys DesignWare core.
There are three Universal PHY (UPHY) blocks (viz. HSIO, NVHS and GBE) with
each block supporting 8 lanes respectively. Controllers:0~4 use UPHY lanes
from HSIO block, Controllers:5,6 use UPHY lanes from NVHS block and
Controllers:7~10 use UPHY lanes from GBE block. Lane mapping in each block
is controlled in XBAR module by BPMP-FW. Since PCIe core has PIPE interface,
a glue module called PIPE-to-UPHY (P2U) is used to connect each UPHY lane
(applicable to all three UPHY bricks i.e. HSIO/NVHS/GBE) to PCIe controller.
All the controllers can operate in the RootPort mode where as only controllers
C5, C6, C7 and C10 can operate in the EndPoint mode.
This patch series
- Adds support for Tegra234 in the existing P2U PHY driver
- Adds support for Tegra234 in the existing PCIe platform controller driver
- Adds device tree nodes for all PCIe controllers
- Enables nodes applicable to P3737-0000 platform
Testing done on P3737-0000 platform
- PCIe link is up with on-board Broadcom WiFi controller
- PCIe link is up with an NVMe drive connected to M.2 Key-M slot and its
functionality is verified
- PCIe link is up with a variety of cards (NICs and USB3.0 add-on cards)
connected to CEM slot and their functionality is verified
- PCIe link is up with C5 controller configured for the endpoint mode with
a host
V3:
* Add DT nodes for the controllers that can work in the EndPoint mode
* Converted the existing device-tree binding documentation from .txt to .yaml
* Add T234 specific information to the RP and EP .yaml documentation files
* Added regulators required to power up required power rails
V2:
* Dropped 3 patches that add clocks & resets IDs, power-domain IDs and
memory IDs for PCIe controllers as the patches are already available
in linux-next
* Based on Bjorn's review comment, reverted the commit b57256918399 ("PCI:
tegra194: Rename tegra_pcie_dw to tegra194_pcie") and pushed it as a
separate patch before adding support for T234 in the existing driver
* Addressed review comments from Rob for the other changes
Vidya Sagar (10):
dt-bindings: PHY: P2U: Add support for Tegra234 P2U block
dt-bindings: PCI: tegra234: Add schema for tegra234 rootport mode
dt-bindings: PCI: tegra234: Add schema for tegra234 endpoint mode
arm64: tegra: Add regulators required for PCIe
arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT
arm64: tegra: Enable PCIe slots in P3737-0000 board
phy: tegra: Add PCIe PIPE2UPHY support for Tegra234
PCI: Disable MSI for Tegra234 root ports
Revert "PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie"
PCI: tegra: Add Tegra234 PCIe support
.../bindings/pci/nvidia,tegra194-pcie-ep.yaml | 370 +++++++
.../bindings/pci/nvidia,tegra194-pcie.txt | 245 -----
.../bindings/pci/nvidia,tegra194-pcie.yaml | 395 ++++++++
.../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +-
.../bindings/phy/phy-tegra194-p2u.yaml | 17 +-
.../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 24 +
.../nvidia/tegra234-p3737-0000+p3701-0000.dts | 52 +
.../boot/dts/nvidia/tegra234-p3737-0000.dtsi | 23 +
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 935 ++++++++++++++++++
drivers/pci/controller/dwc/pcie-tegra194.c | 622 ++++++++----
drivers/pci/quirks.c | 13 +-
drivers/phy/tegra/phy-tegra194-p2u.c | 48 +-
12 files changed, 2295 insertions(+), 451 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml
delete mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
create mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml
--
2.17.1
