On 5/4/22 14:52, Robin Murphy wrote: > On 2022-05-04 01:52, Dmitry Osipenko wrote: >> On 4/11/22 16:46, Robin Murphy wrote: >>> @@ -1092,6 +1092,19 @@ static bool host1x_drm_wants_iommu(struct >>> host1x_device *dev) >>> struct host1x *host1x = dev_get_drvdata(dev->dev.parent); >>> struct iommu_domain *domain; >>> + /* For starters, this is moot if no IOMMU is available */ >>> + if (!device_iommu_mapped(&dev->dev)) >>> + return false; >> >> Unfortunately this returns false on T30 with enabled IOMMU because we >> don't use IOMMU for Host1x on T30 [1] to optimize performance. We can't >> change it until we will update drivers to support Host1x-dedicated >> buffers. > > Huh, so is dev->dev here not the DRM device? If it is, and > device_iommu_mapped() returns false, then the later iommu_attach_group() > call is going to fail anyway, so there's not much point allocating a > domain. If it's not, then what the heck is host1x_drm_wants_iommu() > actually testing for? The dev->dev is the host1x device and it's the DRM device. The iommu_attach_group() is called for the DRM sub-devices (clients in the Tegra driver), which are the devices sitting on the host1x bus. There is no single GPU device on Tegra, instead it's composed of independent GPU engines and display controllers that are connected to the host1x bus. Host1x also has channel DMA engines that are used by DRM driver. We don't have dedicated devices for the host1x DMA, there is single host1x driver that manages host1x bus and DMA. -- Best regards, Dmitry
