On Fri, Apr 29, 2022 at 09:11:59AM +0200, Krzysztof Kozlowski wrote: > On 26/04/2022 09:38, Ashish Mhetre wrote: > > From tegra186 onwards, memory controller support multiple channels. > > Add support for mapping address spaces of these channels. > > Add number of channels supported by tegra186, tegra194 and tegra234. > > In case of old bindings, channels won't be present. If channels are not > > present then print warning and continue so that backward compatibility > > will be preserved in driver. > > During error interrupts from memory controller, appropriate registers > > from these channels need to be accessed for logging error info. > > > > Reviewed-by: Dmitry Osipenko <dmitry.osipenko@xxxxxxxxxxxxx> > > Signed-off-by: Ashish Mhetre <amhetre@xxxxxxxxxx> > > --- > > drivers/memory/tegra/mc.c | 6 ++++++ > > drivers/memory/tegra/tegra186.c | 34 +++++++++++++++++++++++++++++++++ > > drivers/memory/tegra/tegra194.c | 1 + > > drivers/memory/tegra/tegra234.c | 1 + > > This does not apply, neither on my mem-ctrl-next, nor on master. > Probably because tegra234 is somewhere else (Thierry?). Either you send > it without tegra234 or it goes via Thierry's tree. Yeah, I can apply these on top of my tree and then forward the whole batch to you or ARM SoC next week. Thierry
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