From: Baruch Siach <baruch.siach@xxxxxxxxx>
Add the generic 'max-link-speed' that correctly describes the IPQ6018
PCIe link generation limit. This allows the generic dwc code to
configure the link speed correctly.
Signed-off-by: Baruch Siach <baruch.siach@xxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index a717fc17523d..665ee301b85d 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -438,6 +438,7 @@ pcie0: pci@20000000 {
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
+ max-link-speed = <3>;
#address-cells = <3>;
#size-cells = <2>;
--
2.34.1
