Re: [Patch V1 3/4] memory: tegra: add mc-err support for T186

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Subject: Re: [Patch V1 3/4] memory: tegra: add mc-err support for T186
From: Dmitry Osipenko <digetx@xxxxxxxxx>
Date: Wed, 12 Jan 2022 14:22:31 +0300
Cc: Snikam@xxxxxxxxxx, vdumpa@xxxxxxxxxx
In-reply-to: <1641926750-27544-4-git-send-email-amhetre@nvidia.com>
References: <1641926750-27544-1-git-send-email-amhetre@nvidia.com> <1641926750-27544-4-git-send-email-amhetre@nvidia.com>
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0

11.01.2022 21:45, Ashish Mhetre пишет:
>  #define MC_INT_DECERR_ROUTE_SANITY			BIT(20)
>  #define MC_INT_WCAM_ERR					BIT(19)
>  #define MC_INT_SCRUB_ECC_WR_ACK				BIT(18)

I don't see where these errors are handled in the code. Is documentation
that explains these bits publicly available?

Follow-Ups:
- Re: [Patch V1 3/4] memory: tegra: add mc-err support for T186
  - From: Dmitry Osipenko

References:
- [Patch V1 0/4] memory: tegra: Update mc interrupts
  - From: Ashish Mhetre
- [Patch V1 3/4] memory: tegra: add mc-err support for T186
  - From: Ashish Mhetre

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