Am Donnerstag, dem 16.12.2021 um 17:24 +0800 schrieb Xiaoliang Yang:
> Eqos ethernet support five queues on hardware, enable these queues
> and
> configure the priority of each queue. Uses Strict Priority as
> scheduling
> algorithms to ensure that the TSN function works.
>
> The priority of each queue is a bitmask value that maps VLAN tag
> priority to the queue. Since the hardware only supports five queues,
> this patch maps priority 0-4 to queues one by one, and priority 5-7
> to
> queue 4.
>
> The total fifo size of 5 queues is 8192 bytes, if enable 5 queues
> with
> store-and-forward mode, it's not enough for large packets, which
> would
> trigger fifo overflow frequently. This patch set DMA to thresh mode
> to
> enable all 5 queues.
Is there a specific reason to configure this only on board-level but
not for all imx8mp in general?
Thanks
Alexander
> Signed-off-by: Xiaoliang Yang <
> xiaoliang.yang_1@xxxxxxx
> >
> Reviewed-by: Joakim Zhang <
> qiangqing.zhang@xxxxxxx
> >
> ---
> v1->v2:
> - Use bitmask to set priority attributes.
> - Add default properties for each queue.
> - Add CC to the maintainers.
> v2->v3:
> - Add newline between properties and child node.
>
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 68
> ++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index 7b99fad6e4d6..6fd1376258db 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -86,6 +86,9 @@
> pinctrl-0 = <&pinctrl_eqos>;
> phy-mode = "rgmii-id";
> phy-handle = <ðphy0>;
> + snps,force_thresh_dma_mode;
> + snps,mtl-tx-config = <&mtl_tx_setup>;
> + snps,mtl-rx-config = <&mtl_rx_setup>;
> status = "okay";
>
> mdio {
> @@ -99,6 +102,71 @@
> eee-broken-1000t;
> };
> };
> +
> + mtl_tx_setup: tx-queues-config {
> + snps,tx-queues-to-use = <5>;
> + snps,tx-sched-sp;
> +
> + queue0 {
> + snps,dcb-algorithm;
> + snps,priority = <0x1>;
> + };
> +
> + queue1 {
> + snps,dcb-algorithm;
> + snps,priority = <0x2>;
> + };
> +
> + queue2 {
> + snps,dcb-algorithm;
> + snps,priority = <0x4>;
> + };
> +
> + queue3 {
> + snps,dcb-algorithm;
> + snps,priority = <0x8>;
> + };
> +
> + queue4 {
> + snps,dcb-algorithm;
> + snps,priority = <0xf0>;
> + };
> + };
> +
> + mtl_rx_setup: rx-queues-config {
> + snps,rx-queues-to-use = <5>;
> + snps,rx-sched-sp;
> +
> + queue0 {
> + snps,dcb-algorithm;
> + snps,priority = <0x1>;
> + snps,map-to-dma-channel = <0>;
> + };
> +
> + queue1 {
> + snps,dcb-algorithm;
> + snps,priority = <0x2>;
> + snps,map-to-dma-channel = <1>;
> + };
> +
> + queue2 {
> + snps,dcb-algorithm;
> + snps,priority = <0x4>;
> + snps,map-to-dma-channel = <2>;
> + };
> +
> + queue3 {
> + snps,dcb-algorithm;
> + snps,priority = <0x8>;
> + snps,map-to-dma-channel = <3>;
> + };
> +
> + queue4 {
> + snps,dcb-algorithm;
> + snps,priority = <0xf0>;
> + snps,map-to-dma-channel = <4>;
> + };
> + };
> };
>
> &fec {
