Adding device tree nodes to enable the driver for handling errors from
Control Backbone(CBB). CBB version 1.0 is used in Tegra194 SOC.
Signed-off-by: Sumit Gupta <sumitg@xxxxxxxxxx>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 62 +++++++++++++++++++++++-
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 851e049b3519..b302a46ce53e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -22,7 +22,7 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x40000000>;
- misc@100000 {
+ apbmisc: misc@100000 {
compatible = "nvidia,tegra194-misc";
reg = <0x00100000 0xf000>,
<0x0010f000 0x1000>;
@@ -87,6 +87,27 @@
gpio-controller;
};
+ cbb-noc@2300000 {
+ compatible = "nvidia,tegra194-cbb-noc";
+ reg = <0x02300000 0x1000>;
+ interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+ nvidia,axi2apb = <&axi2apb>;
+ nvidia,apbmisc = <&apbmisc>;
+ status = "okay";
+ };
+
+ axi2apb: axi2apb@2390000 {
+ compatible = "nvidia,tegra194-axi2apb-bridge";
+ reg = <0x2390000 0x1000>,
+ <0x23a0000 0x1000>,
+ <0x23b0000 0x1000>,
+ <0x23c0000 0x1000>,
+ <0x23d0000 0x1000>,
+ <0x23e0000 0x1000>;
+ status = "okay";
+ };
+
ethernet@2490000 {
compatible = "nvidia,tegra194-eqos",
"nvidia,tegra186-eqos",
@@ -1359,6 +1380,26 @@
#phy-cells = <0>;
};
+ sce-noc@b600000 {
+ compatible = "nvidia,tegra194-sce-noc";
+ reg = <0xb600000 0x1000>;
+ interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ nvidia,axi2apb = <&axi2apb>;
+ nvidia,apbmisc = <&apbmisc>;
+ status = "okay";
+ };
+
+ rce-noc@be00000 {
+ compatible = "nvidia,tegra194-rce-noc";
+ reg = <0xbe00000 0x1000>;
+ interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ nvidia,axi2apb = <&axi2apb>;
+ nvidia,apbmisc = <&apbmisc>;
+ status = "okay";
+ };
+
hsp_aon: hsp@c150000 {
compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
reg = <0x0c150000 0x90000>;
@@ -1374,6 +1415,15 @@
#mbox-cells = <2>;
};
+ aon-noc@c600000 {
+ compatible = "nvidia,tegra194-aon-noc";
+ reg = <0xc600000 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+ nvidia,apbmisc = <&apbmisc>;
+ status = "okay";
+ };
+
gen2_i2c: i2c@c240000 {
compatible = "nvidia,tegra194-i2c";
reg = <0x0c240000 0x10000>;
@@ -1552,6 +1602,16 @@
status = "okay";
};
+ bpmp-noc@d600000 {
+ compatible = "nvidia,tegra194-bpmp-noc";
+ reg = <0xd600000 0x1000>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ nvidia,axi2apb = <&axi2apb>;
+ nvidia,apbmisc = <&apbmisc>;
+ status = "okay";
+ };
+
host1x@13e00000 {
compatible = "nvidia,tegra194-host1x";
reg = <0x13e00000 0x10000>,
--
2.17.1
