On Fri, Sep 17, 2021 at 12:54 PM Thierry Reding <thierry.reding@xxxxxxxxx> wrote: > From: Thierry Reding <treding@xxxxxxxxxx> > > Tegra194 and later support more than a single interrupt per bank. This > is primarily useful for virtualization but can also be helpful for more > fine-grained CPU affinity control. To keep things simple for now, route > all pins to the first interrupt. > > For backwards-compatibility, support old device trees that specify only > one interrupt per bank by counting the interrupts at probe time. > > Signed-off-by: Thierry Reding <treding@xxxxxxxxxx> Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> Yours, Linus Walleij
