On 12/09/2021 22:08, Dmitry Osipenko wrote:
> Convert NVIDIA Tegra video decoder binding to schema.
>
> Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
Acked-by: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>
Regards,
Hans
> ---
> .../bindings/media/nvidia,tegra-vde.txt | 64 -----------
> .../bindings/media/nvidia,tegra-vde.yaml | 107 ++++++++++++++++++
> 2 files changed, 107 insertions(+), 64 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt
> create mode 100644 Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt b/Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt
> deleted file mode 100644
> index 602169b8aa19..000000000000
> --- a/Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt
> +++ /dev/null
> @@ -1,64 +0,0 @@
> -NVIDIA Tegra Video Decoder Engine
> -
> -Required properties:
> -- compatible : Must contain one of the following values:
> - - "nvidia,tegra20-vde"
> - - "nvidia,tegra30-vde"
> - - "nvidia,tegra114-vde"
> - - "nvidia,tegra124-vde"
> - - "nvidia,tegra132-vde"
> -- reg : Must contain an entry for each entry in reg-names.
> -- reg-names : Must include the following entries:
> - - sxe
> - - bsev
> - - mbe
> - - ppe
> - - mce
> - - tfe
> - - ppb
> - - vdma
> - - frameid
> -- iram : Must contain phandle to the mmio-sram device node that represents
> - IRAM region used by VDE.
> -- interrupts : Must contain an entry for each entry in interrupt-names.
> -- interrupt-names : Must include the following entries:
> - - sync-token
> - - bsev
> - - sxe
> -- clocks : Must include the following entries:
> - - vde
> -- resets : Must contain an entry for each entry in reset-names.
> -- reset-names : Should include the following entries:
> - - vde
> -
> -Optional properties:
> -- resets : Must contain an entry for each entry in reset-names.
> -- reset-names : Must include the following entries:
> - - mc
> -- iommus: Must contain phandle to the IOMMU device node.
> -
> -Example:
> -
> -video-codec@6001a000 {
> - compatible = "nvidia,tegra20-vde";
> - reg = <0x6001a000 0x1000 /* Syntax Engine */
> - 0x6001b000 0x1000 /* Video Bitstream Engine */
> - 0x6001c000 0x100 /* Macroblock Engine */
> - 0x6001c200 0x100 /* Post-processing Engine */
> - 0x6001c400 0x100 /* Motion Compensation Engine */
> - 0x6001c600 0x100 /* Transform Engine */
> - 0x6001c800 0x100 /* Pixel prediction block */
> - 0x6001ca00 0x100 /* Video DMA */
> - 0x6001d800 0x300 /* Video frame controls */>;
> - reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
> - "tfe", "ppb", "vdma", "frameid";
> - iram = <&vde_pool>; /* IRAM region */
> - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */
> - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */
> - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
> - interrupt-names = "sync-token", "bsev", "sxe";
> - clocks = <&tegra_car TEGRA20_CLK_VDE>;
> - reset-names = "vde", "mc";
> - resets = <&tegra_car 61>, <&mc TEGRA20_MC_RESET_VDE>;
> - iommus = <&mc TEGRA_SWGROUP_VDE>;
> -};
> diff --git a/Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml b/Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml
> new file mode 100644
> index 000000000000..3b6c1f031e04
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Video Decoder Engine
> +
> +maintainers:
> + - Dmitry Osipenko <digetx@xxxxxxxxx>
> + - Jon Hunter <jonathanh@xxxxxxxxxx>
> + - Thierry Reding <thierry.reding@xxxxxxxxx>
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - nvidia,tegra132-vde
> + - nvidia,tegra124-vde
> + - nvidia,tegra114-vde
> + - nvidia,tegra30-vde
> + - enum:
> + - nvidia,tegra20-vde
> + - items:
> + - const: nvidia,tegra20-vde
> +
> + reg:
> + maxItems: 9
> +
> + reg-names:
> + items:
> + - const: sxe
> + - const: bsev
> + - const: mbe
> + - const: ppe
> + - const: mce
> + - const: tfe
> + - const: ppb
> + - const: vdma
> + - const: frameid
> +
> + clocks:
> + maxItems: 1
> +
> + resets:
> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: vde
> + - const: mc
> +
> + interrupts:
> + maxItems: 3
> +
> + interrupt-names:
> + items:
> + - const: sync-token
> + - const: bsev
> + - const: sxe
> +
> + iommus:
> + maxItems: 1
> +
> + iram:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle of the SRAM MMIO node.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - resets
> + - reset-names
> + - interrupts
> + - interrupt-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + video-codec@6001a000 {
> + compatible = "nvidia,tegra20-vde";
> + reg = <0x6001a000 0x1000>, /* Syntax Engine */
> + <0x6001b000 0x1000>, /* Video Bitstream Engine */
> + <0x6001c000 0x100>, /* Macroblock Engine */
> + <0x6001c200 0x100>, /* Post-processing Engine */
> + <0x6001c400 0x100>, /* Motion Compensation Engine */
> + <0x6001c600 0x100>, /* Transform Engine */
> + <0x6001c800 0x100>, /* Pixel prediction block */
> + <0x6001ca00 0x100>, /* Video DMA */
> + <0x6001d800 0x300>; /* Video frame controls */
> + reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
> + "tfe", "ppb", "vdma", "frameid";
> + iram = <&iram>; /* IRAM MMIO region */
> + interrupts = <0 9 4>, /* Sync token */
> + <0 10 4>, /* BSE-V */
> + <0 12 4>; /* SXE */
> + interrupt-names = "sync-token", "bsev", "sxe";
> + clocks = <&clk 61>;
> + reset-names = "vde", "mc";
> + resets = <&rst 61>, <&mem 13>;
> + iommus = <&mem 15>;
> + };
>
