Em Mon, 12 Jul 2021 11:45:04 -0600
Rob Herring <robh@xxxxxxxxxx> escreveu:
> On Fri, Jul 09, 2021 at 03:57:42PM +0200, Mauro Carvalho Chehab wrote:
> > Convert the file to DT schema.
> >
> > Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx>
> > diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> > index 1810bf722350..3f49c8017c7a 100644
> > --- a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> > + reg:
> > + description: |
> > + It should contain Data Bus Interface (dbi, dbi2) registers for all
> > + versions.
>
> Not all versions have dbi2.
>
> > + For designware cores version < 4.80, contains the configuration
> > + address space. For designware core version >= 4.80,
> > + contains the configuration and ATU address space.
>
> config space should always be present. For a brief time (around 2014),
> it was not required but has been since. For purposes of the schema, we
> can say always required.
>
> ATU is optional in 4.80 or later.
>
> > + minItems: 2
> > + maxItems: 4
> > +
> > + reg-names:
> > + minItems: 2
> > + maxItems: 4
> > + items:
> > + contains:
>
> Drop contains.
>
> > + enum: [dbi, dbi2, config, atu, addr_space]
This actually generated a warning:
/new_devel/v4l/hikey970/Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: reg-names:2: 'app' is not one of ['dbi', 'dbi2', 'config', 'atu', 'addr_space']
I guess it needs to be changed to:
enum: [dbi, dbi2, config, atu, addr_space, app]
or intel-gw-pcie.yaml would require an extra change.
That's said, I didn't find any DTS using compatible = "intel,lgm-pcie",
but looking at drivers/pci/controller/dwc/pcie-intel-gw.c, it seems
that this is a mandatory register on such hardware.
> > +
> > + num-lanes:
> > + $ref: '/schemas/types.yaml#/definitions/uint32'
> > + description: |
> > + number of lanes to use (this property should be specified unless
> > + the link is brought already up in BIOS)
> > + maxItems: 1
>
> Drop. Not an array. 'maximum: 16' is needed though pci-bus.yaml may
> cover that already.
It seems that num-lanes is not there at pci-bus.yaml - at least not
at the version I'm using here (2021.7.dev1+ge5f58d415b1d).
> > +patternProperties:
> > + "pcie?_ep@[0-9a-f]+$":
> > + type: object
> > + properties:
> > + compatible:
> > + contains:
> > + const: snps,dw-pcie-ep
>
> This doesn't make sense. This is defining a child node of the DW
> controller with 'snps,dw-pcie-ep'.
This was an attempt to silence those warnings:
From schema: /new_devel/v4l/hikey970/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
/new_devel/v4l/hikey970/Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: '#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'clocks', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'linux,pci-domain', 'max-link-speed', 'phy-names', 'phys', 'ranges', 'reset-assert-ms', 'resets' do not match any of the regexes: 'pinctrl-[0-9]+'
From schema: /new_devel/v4l/hikey970/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
/new_devel/v4l/hikey970/Documentation/devicetree/bindings/pci/snps,dw-pcie.example.dt.yaml: pcie@dfc00000: '#address-cells', '#interrupt-cells', '#size-cells', 'device_type', 'interrupts', 'ranges' do not match any of the regexes: 'pinctrl-[0-9]+'
From schema: /new_devel/v4l/hikey970/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
Somehow, dtschema is only accepting 'pinctrl-[0-9]+' regex when parsing
examples on this file. I've no idea how to fix it.
As a reference, this is how the examples are now declared:
<snip>
examples:
- |
pcie@dfc00000 {
compatible = "snps,dw-pcie";
reg = <0xdfc00000 0x0001000>, /* IP registers */
<0xd0000000 0x0002000>; /* Configuration space */
reg-names = "dbi", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>,
<0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
interrupts = <25>, <24>;
#interrupt-cells = <1>;
num-lanes = <1>;
};
pcie-ep@dfd00000 {
compatible = "snps,dw-pcie-ep";
reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
<0xdfc01000 0x0001000>, /* IP registers 2 */
<0xd0000000 0x2000000>; /* Configuration space */
reg-names = "dbi", "dbi2", "addr_space";
};
</snip>
Thanks,
Mauro
