01.06.2021 05:55, Chanwoo Choi пишет:
> On 6/1/21 11:23 AM, Dmitry Osipenko wrote:
>> Convert NVIDIA Tegra ACTMON binding to schema.
>>
>> Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
>> Acked-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
>> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
>> ---
>> .../arm/tegra/nvidia,tegra30-actmon.txt | 57 ---------
>> .../devfreq/nvidia,tegra30-actmon.yaml | 121 ++++++++++++++++++
>> 2 files changed, 121 insertions(+), 57 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-actmon.txt
>> create mode 100644 Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-actmon.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-actmon.txt
>> deleted file mode 100644
>> index 897eedfa2bc8..000000000000
>> --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-actmon.txt
>> +++ /dev/null
>> @@ -1,57 +0,0 @@
>> -NVIDIA Tegra Activity Monitor
>> -
>> -The activity monitor block collects statistics about the behaviour of other
>> -components in the system. This information can be used to derive the rate at
>> -which the external memory needs to be clocked in order to serve all requests
>> -from the monitored clients.
>> -
>> -Required properties:
>> -- compatible: should be "nvidia,tegra<chip>-actmon"
>> -- reg: offset and length of the register set for the device
>> -- interrupts: standard interrupt property
>> -- clocks: Must contain a phandle and clock specifier pair for each entry in
>> -clock-names. See ../../clock/clock-bindings.txt for details.
>> -- clock-names: Must include the following entries:
>> - - actmon
>> - - emc
>> -- resets: Must contain an entry for each entry in reset-names. See
>> -../../reset/reset.txt for details.
>> -- reset-names: Must include the following entries:
>> - - actmon
>> -- operating-points-v2: See ../bindings/opp/opp.txt for details.
>> -- interconnects: Should contain entries for memory clients sitting on
>> - MC->EMC memory interconnect path.
>> -- interconnect-names: Should include name of the interconnect path for each
>> - interconnect entry. Consult TRM documentation for
>> - information about available memory clients, see MEMORY
>> - CONTROLLER section.
>> -
>> -For each opp entry in 'operating-points-v2' table:
>> -- opp-supported-hw: bitfield indicating SoC speedo ID mask
>> -- opp-peak-kBps: peak bandwidth of the memory channel
>> -
>> -Example:
>> - dfs_opp_table: opp-table {
>> - compatible = "operating-points-v2";
>> -
>> - opp@12750000 {
>> - opp-hz = /bits/ 64 <12750000>;
>> - opp-supported-hw = <0x000F>;
>> - opp-peak-kBps = <51000>;
>> - };
>> - ...
>> - };
>> -
>> - actmon@6000c800 {
>> - compatible = "nvidia,tegra124-actmon";
>> - reg = <0x0 0x6000c800 0x0 0x400>;
>> - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&tegra_car TEGRA124_CLK_ACTMON>,
>> - <&tegra_car TEGRA124_CLK_EMC>;
>> - clock-names = "actmon", "emc";
>> - resets = <&tegra_car 119>;
>> - reset-names = "actmon";
>> - operating-points-v2 = <&dfs_opp_table>;
>> - interconnects = <&mc TEGRA124_MC_MPCORER &emc>;
>> - interconnect-names = "cpu";
>> - };
>> diff --git a/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml b/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml
>> new file mode 100644
>> index 000000000000..ba938eed28ee
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml
>> @@ -0,0 +1,121 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: https://protect2.fireeye.com/v1/url?k=c852e9c6-97c9d0fb-c8536289-0cc47a31309a-748d620b8cc48f8b&q=1&e=c1b6a671-e53d-468c-81f5-3e23bd2e67d9&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdevfreq%2Fnvidia%2Ctegra30-actmon.yaml%23
>> +$schema: https://protect2.fireeye.com/v1/url?k=1abc12fa-45272bc7-1abd99b5-0cc47a31309a-ca738d567d90525e&q=1&e=c1b6a671-e53d-468c-81f5-3e23bd2e67d9&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
>> +
>> +title: NVIDIA Tegra30 Activity Monitor
>> +
>> +maintainers:
>> + - Dmitry Osipenko <digetx@xxxxxxxxx>
>> + - Jon Hunter <jonathanh@xxxxxxxxxx>
>> + - Thierry Reding <thierry.reding@xxxxxxxxx>
>> +
>> +description: |
>> + The activity monitor block collects statistics about the behaviour of other
>> + components in the system. This information can be used to derive the rate at
>> + which the external memory needs to be clocked in order to serve all requests
>> + from the monitored clients.
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - nvidia,tegra30-actmon
>> + - nvidia,tegra114-actmon
>> + - nvidia,tegra124-actmon
>> + - nvidia,tegra210-actmon
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clocks:
>> + maxItems: 2
>> +
>> + clock-names:
>> + items:
>> + - const: actmon
>> + - const: emc
>> +
>> + resets:
>> + maxItems: 1
>> +
>> + reset-names:
>> + items:
>> + - const: actmon
>> +
>> + interrupts:
>> + maxItems: 1
>> +
>> + interconnects:
>> + minItems: 1
>> + maxItems: 12
>> +
>> + interconnect-names:
>> + minItems: 1
>> + maxItems: 12
>> + description:
>> + Should include name of the interconnect path for each interconnect
>> + entry. Consult TRM documentation for information about available
>> + memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections.
>> +
>> + operating-points-v2:
>> + description:
>> + Should contain freqs and voltages and opp-supported-hw property, which
>> + is a bitfield indicating SoC speedo ID mask.
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - clocks
>> + - clock-names
>> + - resets
>> + - reset-names
>> + - interrupts
>> + - interconnects
>> + - interconnect-names
>> + - operating-points-v2
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/memory/tegra30-mc.h>
>> +
>> + mc: memory-controller@7000f000 {
>> + compatible = "nvidia,tegra30-mc";
>> + reg = <0x7000f000 0x400>;
>> + clocks = <&clk 32>;
>> + clock-names = "mc";
>> +
>> + interrupts = <0 77 4>;
>> +
>> + #iommu-cells = <1>;
>> + #reset-cells = <1>;
>> + #interconnect-cells = <1>;
>> + };
>> +
>> + emc: external-memory-controller@7000f400 {
>> + compatible = "nvidia,tegra30-emc";
>> + reg = <0x7000f400 0x400>;
>> + interrupts = <0 78 4>;
>> + clocks = <&clk 57>;
>> +
>> + nvidia,memory-controller = <&mc>;
>> + operating-points-v2 = <&dvfs_opp_table>;
>> + power-domains = <&domain>;
>> +
>> + #interconnect-cells = <0>;
>> + };
>> +
>> + actmon@6000c800 {
>> + compatible = "nvidia,tegra30-actmon";
>> + reg = <0x6000c800 0x400>;
>> + interrupts = <0 45 4>;
>> + clocks = <&clk 119>, <&clk 57>;
>> + clock-names = "actmon", "emc";
>> + resets = <&rst 119>;
>> + reset-names = "actmon";
>> + operating-points-v2 = <&dvfs_opp_table>;
>> + interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
>> + interconnect-names = "cpu-read";
>> + };
>>
>
> If tegra maintainer confirms this patch, I'll take it.
Okay, thank you.
